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AT32UC3C0512CAU
AT32UC3C0512CAU | |
|---|---|
| Manufacturer Part Number | AT32UC3C0512CAU |
| Manufacturer | Atmel Corporation |
| AT32UC3C0512CAU datasheets |
|
Availability: In stock
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Specifications of AT32UC3C0512CAU | |||
|---|---|---|---|
| Flash (kbytes) | 512 Kbytes | Pin Count | 144 |
| Max. Operating Frequency | 66 MHz | Cpu | 32-bit AVR |
| # Of Touch Channels | 32 | Hardware Qtouch Acquisition | No |
| Max I/o Pins | 123 | Ext Interrupts | 144 |
| Usb Transceiver | 1 | Quadrature Decoder Channels | 2 |
| Usb Speed | Full Speed | Usb Interface | Device + OTG |
| Spi | 7 | Twi (i2c) | 3 |
| Uart | 5 | Can | 2 |
| Lin | 5 | Ssc | 1 |
| Ethernet | 1 | Graphic Lcd | No |
| Video Decoder | No | Camera Interface | No |
| Adc Channels | 16 | Adc Resolution (bits) | 12 |
| Adc Speed (ksps) | 2000 | Analog Comparators | 4 |
| Resistive Touch Screen | No | Dac Channels | 4 |
| Dac Resolution (bits) | 12 | Temp. Sensor | No |
| Crypto Engine | No | Sram (kbytes) | 68 |
| Self Program Memory | YES | External Bus Interface | 1 |
| Dram Memory | sdram | Nand Interface | No |
| Picopower | No | Temp. Range (deg C) | -40 to 85 |
| I/o Supply Class | 3.0 to 3.6 or 4.5 to 5.5 | Operating Voltage (vcc) | 3.0 to 3.6 or 4.5 to 5.5 |
| Fpu | Yes | Mpu / Mmu | Yes / No |
| Timers | 6 | Output Compare Channels | 22 |
| Input Capture Channels | 12 | Pwm Channels | 20 |
| 32khz Rtc | Yes | Calibrated Rc Oscillator | Yes |
AT32UC3A0128 PDF datasheetAT32UC3A0128 PDF datasheet #2AT32UC3A0128AU PDF datasheet #3AT32UC3C0128C PDF datasheet #4AT32UC3C0128C PDF datasheet #5
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PrevNext
9.3.4
DSP Operations
Table 9-4.
DSP Operations
Mnemonics
Operands / Syntax
Rd, Rx:<part>,
addhh.w
E
Ry:<part>
Rd, Rx:<part>,
machh.d
E
Ry:<part>
Rd, Rx:<part>,
machh.w
E
Ry:<part>
macwh.d
E
Rd, Rx, Ry:<part>
Rd, Rx:<part>,
mulhh.w
E
Ry:<part>
mulwh.d
E
Rd, Rx, Ry:<part>
Rd, Rx:<part>,
mulnhh.w
E
Ry:<part>
mulnwh.d
E
Rd, Rx, Ry:<part>
satadd.h
E
Rd, Rx, Ry
satadd.w
E
Rd, Rx, Ry
satsub.h
E
Rd, Rx, Ry
E
Rd, Rx, Ry
satsub.w
E
Rd, Rs, imm
satrnds
E
Rd >> sa, bp
satrndu
E
Rd >> sa, bp
sats
E
Rd >> sa, bp
satu
E
Rd >> sa, bp
Rd, Rx:<part>,
subhh.w
E
Ry:<part>
AVR32
108
Description
Add signed halfwords.
(32 ← 16 +16)
Multiply signed halfwords and
accumulate.
(48 ← 16x16 + 48)
Multiply signed halfwords and
accumulate.
(32 ← 16x16 + 32)
Multiply signed word and halfword and
accumulate.
(48 ← 32x16 + 48)
Signed Multiply of halfwords.
(32 ← 16 x 16)
Unsigned Multiply, word and halfword.
48 ← (32 x 16)
Signed Multiply of halfwords.
(32 ← 16 x 16)
Signed Multiply, word and negated
halfword.
48 ← (32 x 16)
Saturated add halfwords.
Saturated add.
Saturated subtract halfwords.
Saturated subtract.
Signed saturate from bit given by sa5 after
a right shift with rounding of bp5 bit
positions.
Unsigned saturate from bit given by sa5
after a right shift with rounding of bp5 bit
positions.
Signed saturate from bit given by sa5 after
a right shift of bp5 bit positions.
Unsigned saturate from bit given by sa5
after a right shift of bp5 bit positions.
Subtract signed halfwords.
(32 ← 16 -16)
Operation
Rev
Rd ← SE(Rx:<part>) +
1
SE(Ry:<part>)
Rd+1:Rd ← Rx:<part> * Ry:<part>
1
+ Rd+1:Rd
Rd ← Rx:<part> * Ry:<part> + Rd
1
Rd+1:Rd ← ((Rx * Ry:<part>)
1
<<16) + Rd+1:Rd
Rd ← Rx:<part> * Ry:<part>
1
Rd+1:Rd ← ((Rx * Ry:<part>)
1
<<16)
Rd ← Rx:<part> * (- Ry:<part>)
1
Rd+1:Rd ← ((Rx * (- Ry:<part>))
1
<< 16)
Rd ← SE(Sat(Rx[15:0] +
1
Ry[15:0]))
Rd ← Sat(Rx + Ry)
1
Rd ← SE(Sat(Rx[15:0] - Ry[15:0]))
1
Rd ← Sat(Rx - Ry)
1
Rd ← Sat(Rs - SE(imm16) )
1
Rd ← Sat(Round((Rd >> sa5)),
1
bp5)
Rd ← Sat(Round((Rd >> sa5)),
1
bp5)
Rd ← Sat((Rd >> sa5), bp5)
1
Rd ← Sat((Rd >> sa5),bp5)
1
Rd ← SE(Rx:<part>) -
1
SE(Ry:<part>)
32000D–04/2011
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