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AT32UC3C064C
AT32UC3C064C | |
|---|---|
| Manufacturer Part Number | AT32UC3C064C |
| Manufacturer | Atmel Corporation |
| AT32UC3C064C datasheets |
|
Availability: In stock
International delivery:
Warranty: 60 days
×
- We provide standard 60-days warranty for all parts. If warranty differs we always mention it beforehand. In case of return we cover shipping costs.
- If you still have any questions - please contact us
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Shipping terms
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Specifications of AT32UC3C064C | |||
|---|---|---|---|
| Flash (kbytes) | 64 Kbytes | Pin Count | 144 |
| Max. Operating Frequency | 66 MHz | Cpu | 32-bit AVR |
| Hardware Qtouch Acquisition | No | Max I/o Pins | 123 |
| Ext Interrupts | 144 | Usb Transceiver | 1 |
| Quadrature Decoder Channels | 2 | Usb Speed | Full Speed |
| Usb Interface | Device + OTG | Spi | 7 |
| Twi (i2c) | 3 | Uart | 5 |
| Can | 2 | Lin | 5 |
| Ssc | 1 | Ethernet | 1 |
| Graphic Lcd | No | Video Decoder | No |
| Camera Interface | No | Adc Channels | 16 |
| Adc Resolution (bits) | 12 | Adc Speed (ksps) | 2000 |
| Analog Comparators | 4 | Resistive Touch Screen | No |
| Dac Channels | 4 | Dac Resolution (bits) | 12 |
| Temp. Sensor | No | Crypto Engine | No |
| Sram (kbytes) | 20 | Self Program Memory | YES |
| External Bus Interface | 1 | Dram Memory | sdram |
| Nand Interface | No | Picopower | No |
| Temp. Range (deg C) | -40 to 85 | I/o Supply Class | 3.0 to 3.6 or 4.5 to 5.5 |
| Operating Voltage (vcc) | 3.0 to 3.6 or 4.5 to 5.5 | Fpu | Yes |
| Mpu / Mmu | Yes / No | Timers | 6 |
| Output Compare Channels | 22 | Input Capture Channels | 12 |
| Pwm Channels | 20 | 32khz Rtc | Yes |
| Calibrated Rc Oscillator | Yes | ||
AT32UC3A0128 PDF datasheetAT32UC3A0128 PDF datasheet #2AT32UC3C0128C PDF datasheet #3AT32UC3C0128C PDF datasheet #4
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PrevNext
Syntax:
I.
Operands:
I.
Status Flags:
Opcode:
31
1
15
R15 R14 R13 R12 R11 R10 R9
Note:
Emtpy Reglist16 gives UNDEFINED result.
If Rp is in Reglist16 and pointer is written back the result is UNDEFINED.
The R bit in the status register has no effect on this instruction.
AVR32
200
ldm
Rp{++}, Reglist16
Reglist16 ∈ {R0, R1, R2, ..., R12, LR, SP, PC}
p ∈ {0, 1, …, 15}
Flags are only updated if Reglist16[PC] == 1.
They are set as the result of the operation cp R12, 0.
Q:
Not affected
V ← 0
V:
N ← RES[31]
N:
Z ← (RES[31:0] == 0)
Z:
C ← 0
C:
29
28
26
25
1
1
0
0
0
++
R8
24
20
19
1
1
1
0
0
R7
R6
R5
R4
R3
R2
16
Rp
0
R1
R0
32000D–04/2011
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