AT89C5115 Atmel Corporation, AT89C5115 Datasheet - Page 19

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AT89C5115

Manufacturer Part Number
AT89C5115
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT89C5115

Flash (kbytes)
16 Kbytes
Max. Operating Frequency
40 MHz
Cpu
8051-12C
Max I/o Pins
20
Uart
1
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
62.5
Sram (kbytes)
0.5
Eeprom (bytes)
2048
Self Program Memory
API
Operating Voltage (vcc)
3.0 to 5.5
Timers
4
Isp
UART
Watchdog
Yes

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During a Normal
Operation (Warm Reset)
Watchdog Reset
4128G–8051–02/08
Table 13. Minimum Reset Capacitor for a 15k Pull-down Resistor
Note:
Reset pin must be maintained for at least 2 machine cycles (24 oscillator clock periods)
to apply a reset sequence during normal operation. The number of clock periods is
mode independent (X2 or X1).
A 1K resistor must be added in series with the capacitor to allow the use of watchdog
reset pulse output on the RST pin or when an external power-supply supervisor is used.
Figure 6 shows the reset circuitry when a capacitor is used.
Figure 6. Reset Circuitry for a Watchdog Configuration
Figure 7 shows the reset circuitry when an external reset circuit is used.
Figure 7. Reset Circuitry Example Using an External Reset Circuit
oscrst/vddrst
External reset
circuit
20ms
These values assume VDD starts from 0v to the nominal value. If the time between two
on/off sequences is too fast, the power-supply decoupling capacitors may not be fully
discharged, leading to a bad reset sequence.
5ms
VDD
Crst
VDD
1k
2.7µF
10µF
1ms
RST
RST pin
1k
Rrst
RST pin
To other on-board circuitry
10ms
4.7µF
15µF
Reset input circuitry
Rrst
To other on-board circuitry
Internal reset
watchdog
Reset input circuitry
Internal reset
watchdog
100ms
47µF
47µF
19

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