AT89C5115 Atmel Corporation, AT89C5115 Datasheet - Page 7

no-image

AT89C5115

Manufacturer Part Number
AT89C5115
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT89C5115

Flash (kbytes)
16 Kbytes
Max. Operating Frequency
40 MHz
Cpu
8051-12C
Max I/o Pins
20
Uart
1
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
62.5
Sram (kbytes)
0.5
Eeprom (bytes)
2048
Self Program Memory
API
Operating Voltage (vcc)
3.0 to 5.5
Timers
4
Isp
UART
Watchdog
Yes

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT89C5115-RATUM
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
AT89C5115-SISUM
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
AT89C5115-UM
Manufacturer:
SANYO
Quantity:
84
I/O Configurations
Port Structure
4128G–8051–02/08
Each Port SFR operates via type-D latches, as illustrated in Figure 1 for Ports 3 and 4. A
CPU ’write to latch’ signal initiates transfer of internal bus data into the type-D latch. A
CPU ’read latch’ signal transfers the latched Q output onto the internal bus. Similarly, a
’read pin’ signal transfers the logical level of the Port pin. Some Port data instructions
activate the ’read latch’ signal while others activate the ’read pin’ signal. Latch instruc-
tions are referred to as Read-Modify-Write instructions. Each I/O line may be
independently programmed as input or output.
Figure 1 shows the structure of Ports, which have internal pull-ups. An external source
can pull the pin low. Each Port pin can be configured either for general-purpose I/O or
for its alternate input output function.
To use a pin for general-purpose output, set or clear the corresponding bit in the Px reg-
ister (x = 1 to 4). To use a pin for general-purpose input, set the bit in the Px register.
This turns off the output FET drive.
To configure a pin for its alternate function, set the bit in the Px register. When the latch
is set, the ’alternate output function’ signal controls the output level (See Figure 1). The
operation of Ports is discussed further in ’Quasi-Bi-directional Port Operation’
paragraph.
Figure 1. Ports Structure
Note:
READ
LATCH
INTERNAL
BUS
WRITE
TO
LATCH
READ
PIN
1. The internal pull-up can be disabled on P1 when analog function is selected.
D
CL
LATCH
Q
ALTERNATE
OUTPUT
FUNCTION
ALTERNATE
INPUT
FUNCTION
VCC
INTERNAL
PULL-UP (1)
P1.x
P2.x
P3.x
P4.x
(1)
7

Related parts for AT89C5115