AT89C5131A-M Atmel Corporation, AT89C5131A-M Datasheet - Page 70

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AT89C5131A-M

Manufacturer Part Number
AT89C5131A-M
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT89C5131A-M

Flash (kbytes)
32 Kbytes
Max. Operating Frequency
48 MHz
Cpu
8051-12C
Max I/o Pins
34
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
1
Twi (i2c)
1
Uart
1
Sram (kbytes)
1.25
Eeprom (bytes)
1024
Self Program Memory
API
Operating Voltage (vcc)
2.7 to 5.5
Timers
4
Isp
UART/USB
Watchdog
Yes
15.2
15.2.1
70
Automatic Address Recognition
AT89C5130A/31A-M
Given Address
Figure 15-3. UART Timings in Modes 2 and 3
The automatic address recognition feature is enabled when the multiprocessor communication
feature is enabled (SM2 bit in SCON register is set).
Implemented in hardware, automatic address recognition enhances the multiprocessor commu-
nication feature by allowing the serial port to examine the address of each incoming command
frame. Only when the serial port recognizes its own address, the receiver sets RI bit in SCON
register to generate an interrupt. This ensures that the CPU is not interrupted by command
frames addressed to other devices.
If desired, you may enable the automatic address recognition feature in mode 1. In this configu-
ration, the stop bit takes the place of the ninth data bit. Bit RI is set only when the received
command frame address matches the device’s address and is terminated by a valid stop bit.
To support automatic address recognition, a device is identified by a given address and a broad-
cast address.
Note:
Each device has an individual address that is specified in SADDR register; the SADEN register
is a mask byte that contains don’t care bits (defined by zeros) to form the device’s given
address. The don’t care bits provide the flexibility to address one or more slaves at a time. The
following example illustrates how a given address is formed.
To address a device by its individual address, the SADEN mask byte must be 1111 1111b.
For example:
The following is an example of how to use given addresses to address different slaves:
Slave A:SADDR1111 0001b
Slave B:SADDR1111 0011b
SADDR0101 0110b
SADEN1111 1100b
Given0101 01XXb
SADEN1111 1010b
Given1111 0X0Xb
SADEN1111 1001b
Given1111 0XX1b
The multiprocessor communication and automatic address recognition features cannot be
enabled in mode 0 (i.e., setting SM2 bit in SCON register in mode 0 has no effect).
SMOD0 = 0
SMOD0 = 1
SMOD0 = 1
RXD
FE
RI
RI
Start
Bit
D0
D1
D2
D3
Data Byte
D4
D5
D6
D7
Ninth
D8
Bit
Stop
Bit
4337K–USB–04/08

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