AT89C51RC Atmel Corporation, AT89C51RC Datasheet - Page 14

• Manufacturer Part Number: AT89C51RC
• Manufacturer: Atmel Corporation

Specifications of AT89C51RC

• Flash (kbytes): 32 Kbytes
• Max. Operating Frequency: 24 MHz
• Cpu: 8051-12C
• Max I/o Pins: 32
• Uart: 1
• Sram (kbytes): 0.5
• Operating Voltage (vcc): 4.0 to 6.0
• Timers: 3
• Watchdog: Yes

13.2
Figure 13-1. Timer in Capture Mode
14
Auto-Reload (Up or Down Counter)
T2EX PIN
AT89C51RC
OSC
T2 PIN
÷12
Timer 2 can be programmed to count up or down when configured in its 16-bit auto-reload
mode. This feature is invoked by the DCEN (Down Counter Enable) bit located in the SFR
T2MOD (see
count up. When DCEN is set, Timer 2 can count up or down, depending on the value of the
T2EX pin.
Figure 13-2
are selected by bit EXEN2 in T2CON. If EXEN2 = 0, Timer 2 counts up to 0FFFFH and then sets
the TF2 bit upon overflow. The overflow also causes the timer registers to be reloaded with the
16-bit value in RCAP2H and RCAP2L. The values in Timer in Capture Mode RCAP2H and
RCAP2L are preset by software. If EXEN2 = 1, a 16-bit reload can be triggered either by an
overflow or by a 1-to-0 transition at external input T2EX. This transition also sets the EXF2 bit.
Both the TF2 and EXF2 bits can generate an interrupt if enabled.
Setting the DCEN bit enables Timer 2 to count up or down, as shown in
mode, the T2EX pin controls the direction of the count. A logic 1 at T2EX makes Timer 2 count
up. The timer will overflow at 0FFFFH and set the TF2 bit. This overflow also causes the 16-bit
value in RCAP2H and RCAP2L to be reloaded into the timer registers, TH2 and TL2,
respectively.
A logic 0 at T2EX makes Timer 2 count down. The timer underflows when TH2 and TL2 equal
the values stored in RCAP2H and RCAP2L. The underflow sets the TF2 bit and causes 0FFFFH
to be reloaded into the timer registers.
The EXF2 bit toggles whenever Timer 2 overflows or underflows and can be used as a 17th bit
of resolution. In this operating mode, EXF2 does not flag an interrupt.
TRANSITION
DETECTOR
shows Timer 2 automatically counting up when DCEN=0. In this mode, two options
C/T2 = 0
C/T2 = 1
Table
13-2). Upon reset, the DCEN bit is set to 0 so that timer 2 will default to
EXEN2
TR2
CAPTURE
CONTROL
CONTROL
RCAP2H
TH2
EXF2
RCAP2L
TL2
OVERFLOW
TF2
Figure
INTERRUPT
TIMER 2
1920D–MICRO–6/08
13-2. In this