ATmega1281

Manufacturer Part NumberATmega1281
ManufacturerAtmel Corporation
ATmega1281 datasheets
 

Specifications of ATmega1281

Flash (kbytes)128 KbytesPin Count64
Max. Operating Frequency16 MHzCpu8-bit AVR
# Of Touch Channels16Hardware Qtouch AcquisitionNo
Max I/o Pins54Ext Interrupts17
Usb SpeedNoUsb InterfaceNo
Spi3Twi (i2c)1
Uart2Graphic LcdNo
Video DecoderNoCamera InterfaceNo
Adc Channels8Adc Resolution (bits)10
Adc Speed (ksps)15Analog Comparators1
Resistive Touch ScreenNoTemp. SensorNo
Crypto EngineNoSram (kbytes)8
Eeprom (bytes)4096Self Program MemoryYES
Dram MemoryNoNand InterfaceNo
PicopowerNoTemp. Range (deg C)-40 to 85
I/o Supply Class1.8 to 5.5Operating Voltage (vcc)1.8 to 5.5
FpuNoMpu / Mmuno / no
Timers6Output Compare Channels16
Input Capture Channels2Pwm Channels8
32khz RtcYesCalibrated Rc OscillatorYes
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Features
®
High Performance, Low Power Atmel
Advanced RISC Architecture
– 135 Powerful Instructions – Most Single Clock Cycle Execution
– 32 × 8 General Purpose Working Registers
– Fully Static Operation
– Up to 16 MIPS Throughput at 16MHz
– On-Chip 2-cycle Multiplier
High Endurance Non-volatile Memory Segments
– 64K/128K/256KBytes of In-System Self-Programmable Flash
– 4Kbytes EEPROM
– 8Kbytes Internal SRAM
– Write/Erase Cycles:10,000 Flash/100,000 EEPROM
– Data retention: 20 years at 85°C/ 100 years at 25°C
– Optional Boot Code Section with Independent Lock Bits
• In-System Programming by On-chip Boot Program
• True Read-While-Write Operation
– Programming Lock for Software Security
• Endurance: Up to 64Kbytes Optional External Memory Space
®
®
Atmel
QTouch
library support
– Capacitive touch buttons, sliders and wheels
– QTouch and QMatrix® acquisition
– Up to 64 sense channels
JTAG (IEEE std. 1149.1 compliant) Interface
– Boundary-scan Capabilities According to the JTAG Standard
– Extensive On-chip Debug Support
– Programming of Flash, EEPROM, Fuses, and Lock Bits through the JTAG Interface
Peripheral Features
– Two 8-bit Timer/Counters with Separate Prescaler and Compare Mode
– Four 16-bit Timer/Counter with Separate Prescaler, Compare- and Capture Mode
– Real Time Counter with Separate Oscillator
– Four 8-bit PWM Channels
– Six/Twelve PWM Channels with Programmable Resolution from 2 to 16 Bits
(ATmega1281/2561, ATmega640/1280/2560)
– Output Compare Modulator
– 8/16-channel, 10-bit ADC (ATmega1281/2561, ATmega640/1280/2560)
– Two/Four Programmable Serial USART (ATmega1281/2561, ATmega640/1280/2560)
– Master/Slave SPI Serial Interface
– Byte Oriented 2-wire Serial Interface
– Programmable Watchdog Timer with Separate On-chip Oscillator
– On-chip Analog Comparator
– Interrupt and Wake-up on Pin Change
Special Microcontroller Features
– Power-on Reset and Programmable Brown-out Detection
– Internal Calibrated Oscillator
– External and Internal Interrupt Sources
– Six Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, Standby,
and Extended Standby
I/O and Packages
– 54/86 Programmable I/O Lines (ATmega1281/2561, ATmega640/1280/2560)
– 64-pad QFN/MLF, 64-lead TQFP (ATmega1281/2561)
– 100-lead TQFP, 100-ball CBGA (ATmega640/1280/2560)
– RoHS/Fully Green
Temperature Range:
– -40°C to 85°C Industrial
Ultra-Low Power Consumption
– Active Mode: 1MHz, 1.8V: 500µA
– Power-down Mode: 0.1µA at 1.8V
Speed Grade:
– ATmega640V/ATmega1280V/ATmega1281V:
• 0 - 4MHz @ 1.8V - 5.5V, 0 - 8MHz @ 2.7V - 5.5V
– ATmega2560V/ATmega2561V:
• 0 - 2MHz @ 1.8V - 5.5V, 0 - 8MHz @ 2.7V - 5.5V
– ATmega640/ATmega1280/ATmega1281:
• 0 - 8MHz @ 2.7V - 5.5V, 0 - 16MHz @ 4.5V - 5.5V
– ATmega2560/ATmega2561:
• 0 - 16MHz @ 4.5V - 5.5V
®
AVR
8-Bit Microcontroller
8-bit Atmel
Microcontroller
with
64K/128K/256K
Bytes In-System
Programmable
Flash
ATmega640/V
ATmega1280/V
ATmega1281/V
ATmega2560/V
ATmega2561/V
Preliminary
Summary
2549NS–AVR–05/11

ATmega1281 Summary of contents

  • Page 1

    ... Six/Twelve PWM Channels with Programmable Resolution from Bits (ATmega1281/2561, ATmega640/1280/2560) – Output Compare Modulator – 8/16-channel, 10-bit ADC (ATmega1281/2561, ATmega640/1280/2560) – Two/Four Programmable Serial USART (ATmega1281/2561, ATmega640/1280/2560) – Master/Slave SPI Serial Interface – Byte Oriented 2-wire Serial Interface – Programmable Watchdog Timer with Separate On-chip Oscillator – ...

  • Page 2

    Pin Configurations Figure 1-1. TQFP-pinout ATmega640/1280/2560 100 (OC0B) PG5 1 (RXD0/PCINT8) PE0 2 (TXD0) PE1 ...

  • Page 3

    Figure 1-2. CBGA-pinout ATmega640/1280/2560 Top view Table 1- Note: 2549NS–AVR–05/11 ATmega640/1280/1281/2560/2561 ...

  • Page 4

    ... Figure 1-3. Pinout ATmega1281/2561 1 (OC0B) PG5 2 (RXD0/PCINT8/PDI) PE0 3 (TXD0/PDO) PE1 4 (XCK0/AIN0) PE2 5 (OC3A/AIN1) PE3 6 (OC3B/INT4) PE4 7 (OC3C/INT5) PE5 8 (T3/INT6) PE6 9 (ICP3/CLKO/INT7) PE7 10 (SS/PCINT0) PB0 11 (SCK/ PCINT1) PB1 12 (MOSI/ PCINT2) PB2 13 (MISO/ PCINT3) PB3 14 (OC2A/ PCINT4) PB4 15 (OC1A/PCINT5) PB5 16 (OC1B/PCINT6) PB6 Note: 2549NS–AVR–05/11 ...

  • Page 5

    Overview The ATmega640/1280/1281/2560/2561 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega640/1280/1281/2560/2561 achieves throughputs approaching 1 MIPS per MHz allowing the system designer to ...

  • Page 6

    The Atmel ters. All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in one single instruction executed in one clock cycle. The resulting architecture is more code efficient while ...

  • Page 7

    ... Comparison Between ATmega1281/2561 and ATmega640/1280/2560 Each device in the ATmega640/1280/1281/2560/2561 family differs only in memory size and number of pins. Table 2-1. Configuration Summary Device Flash EEPROM ATmega640 64KB ATmega1280 128KB ATmega1281 128KB ATmega2560 256KB ATmega2561 256KB 2.3 Pin Descriptions 2.3.1 VCC Digital supply voltage. 2.3.2 GND Ground. ...

  • Page 8

    The Port C pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port C also serves the functions of special features of the ATmega640/1280/1281/2560/2561 as listed on 2.3.6 Port D ...

  • Page 9

    The Port H pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port H also serves the functions of various special features of the ATmega640/1280/2560 as listed on 2.3.11 Port ...

  • Page 10

    AVCC AVCC is the supply voltage pin for Port F and the A/D Converter. It should be externally con- nected to V through a low-pass filter. 2.3.18 AREF This is the analog reference pin for the A/D Converter. 2549NS–AVR–05/11 ...

  • Page 11

    Resources A comprehensive set of development tools and application notes, and datasheets are available for download on http://www.atmel.com/avr. 4. About Code Examples This documentation contains simple code examples that briefly show how to use various parts of the device. ...

  • Page 12

    Register Summary Address Name Bit 7 (0x1FF) Reserved - ... Reserved - (0x13F) Reserved (0x13E) Reserved (0x13D) Reserved (0x13C) Reserved (0x13B) Reserved (0x13A) Reserved (0x139) Reserved (0x138) Reserved (0x137) Reserved (0x136) UDR3 (0x135) UBRR3H - (0x134) UBRR3L (0x133) Reserved ...

  • Page 13

    Address Name Bit 7 (0x100) PINH PINH7 (0xFF) Reserved - (0xFE) Reserved - (0xFD) Reserved - (0xFC) Reserved - (0xFB) Reserved - (0xFA) Reserved - (0xF9) Reserved - (0xF8) Reserved - (0xF7) Reserved - (0xF6) Reserved - (0xF5) Reserved - ...

  • Page 14

    Address Name Bit 7 (0xBE) Reserved - (0xBD) TWAMR TWAM6 (0xBC) TWCR TWINT (0xBB) TWDR (0xBA) TWAR TWA6 (0xB9) TWSR TWS7 (0xB8) TWBR (0xB7) Reserved - (0xB6) ASSR - (0xB5) Reserved - (0xB4) OCR2B (0xB3) OCR2A (0xB2) TCNT2 (0xB1) TCCR2B ...

  • Page 15

    Address Name Bit 7 (0x7C) ADMUX REFS1 (0x7B) ADCSRB - (0x7A) ADCSRA ADEN (0x79) ADCH (0x78) ADCL (0x77) Reserved - (0x76) Reserved - (0x75) XMCRB XMBK (0x74) XMCRA SRE (0x73) TIMSK5 - (0x72) TIMSK4 - (0x71) TIMSK3 - (0x70) TIMSK2 ...

  • Page 16

    Address Name Bit 7 0x1A (0x3A) TIFR5 - 0x19 (0x39) TIFR4 - 0x18 (0x38) TIFR3 - 0x17 (0x37) TIFR2 - 0x16 (0x36) TIFR1 - 0x15 (0x35) TIFR0 - 0x14 (0x34) PORTG - 0x13 (0x33) DDRG - 0x12 (0x32) PING - ...

  • Page 17

    Instruction Set Summary Mnemonics Operands ARITHMETIC AND LOGIC INSTRUCTIONS ADD Rd, Rr Add two Registers ADC Rd, Rr Add with Carry two Registers ADIW Rdl,K Add Immediate to Word SUB Rd, Rr Subtract two Registers SUBI Rd, K Subtract ...

  • Page 18

    Mnemonics Operands BRVS k Branch if Overflow Flag is Set BRVC k Branch if Overflow Flag is Cleared BRIE k Branch if Interrupt Enabled BRID k Branch if Interrupt Disabled BIT AND BIT-TEST INSTRUCTIONS SBI P,b Set Bit in I/O ...

  • Page 19

    Mnemonics Operands ELPM Rd, Z+ Extended Load Program Memory SPM Store Program Memory IN Rd Port OUT P, Rr Out Port PUSH Rr Push Register on Stack POP Rd Pop Register from Stack MCU CONTROL INSTRUCTIONS NOP No ...

  • Page 20

    Ordering Information 9.1 ATmega640 (2) Speed (MHz) Power Supply 8 1.8 - 5.5V 16 2.7 - 5.5V Notes: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information ...

  • Page 21

    ATmega1280 (2) Speed (MHz) Power Supply 8 1.8V - 5.5V 16 2.7V - 5.5V Notes: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities. ...

  • Page 22

    ... Thin (1.0mm) Plastic Gull Wing Quad Flat Package (TQFP) 64M2 64-pad, 9mm × 9mm × 1.0mm Body, Quad Flat No-lead/Micro Lead Frame Package (QFN/MLF) 2549NS–AVR–05/11 ATmega640/1280/1281/2560/2561 Ordering Code ATmega1281V-8AU (4) ATmega1281V-8AUR ATmega1281V-8MU (4) ATmega1281V-8MUR ATmega1281-16AU (4) ATmega1281-16AUR ATmega1281-16MU (4) ATmega1281-16MUR 369. Package Type (1)(3) Package Operation Range 64A 64A 64M2 64M2 Industrial (-40° ...

  • Page 23

    ATmega2560 (2) Speed (MHz) Power Supply 8 1.8V - 5.5V 16 4.5V - 5.5V Notes: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities. ...

  • Page 24

    ... Thin (1.0mm) Plastic Gull Wing Quad Flat Package (TQFP) 64M2 64-pad, 9mm × 9mm × 1.0mm Body, Quad Flat No-lead/Micro Lead Frame Package (QFN/MLF) 2549NS–AVR–05/11 ATmega640/1280/1281/2560/2561 Ordering Code ATmega1281V-8AU (4) ATmega1281V-8AUR ATmega1281V-8MU (4) ATmega1281V-8MUR ATmega1281-16AU (4) ATmega1281-16AUR ATmega1281-16MU (4) ATmega1281-16MUR 369. Package Type (1)(3) Package Operation Range 64A 64A 64M2 64M2 Industrial (-40° ...

  • Page 25

    Packaging Information 10.1 100A PIN 0°~7° L Notes: 1. This package conforms to JEDEC reference MS-026, Variation AED. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is 0.25 mm per side. Dimensions ...

  • Page 26

    D e 0.90 TYP 0.90 TYP 2325 Orchard Parkway San Jose, CA 95131 R 2549NS–AVR–05/11 ATmega640/1280/1281/2560/2561 E Marked A1 Identifier TOP VIEW Øb A1 Corner ...

  • Page 27

    PIN 0°~7° Notes: 1.This package conforms to JEDEC reference MS-026, Variation AEB. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is 0.25 mm per side. Dimensions D1 and E1 are maximum ...

  • Page 28

    Marked Pin TOP VIEW BOTTOM VIEW Notes: 1. JEDEC Standard MO-220, (SAW Singulation) Fig. 1, VMMD. 2. Dimension and tolerance conform to ASMEY14.5M-1994. 2325 Orchard Parkway San Jose, CA 95131 ...

  • Page 29

    Errata 11.1 ATmega640 rev. B • Inaccurate ADC conversion in differential mode with 200× gain • High current consumption in sleep mode 1. Inaccurate ADC conversion in differential mode with 200× gain With AVCC <3.6V, random conversions will be ...

  • Page 30

    ... SLEEP instruction directly after a SEI instruction. Problem Fix/Workaround Before entering sleep, interrupts not used to wake the part from the sleep mode should be disabled. 11.5 ATmega1281 rev. B • Inaccurate ADC conversion in differential mode with 200× gain • High current consumption in sleep mode 1. ...

  • Page 31

    ... ATmega1281 rev. A • Inaccurate ADC conversion in differential mode with 200× gain • High current consumption in sleep mode 1. Inaccurate ADC conversion in differential mode with 200× gain With AVCC <3.6V, random conversions will be inaccurate. Typical absolute accuracy may reach 64 LSB. Problem Fix/Workaround None ...

  • Page 32

    ATmega2560 rev. A • Non-Read-While-Write area of flash not functional • Part does not work under 2.4 volts • Incorrect ADC reading in differential mode • Internal ADC reference has too low value • IN/OUT instructions may be executed ...

  • Page 33

    Problem Fix/Workaround There are two application work-arounds, where selecting one of them, will be omitting the issue: - Replace IN and OUT with LD/LDS/LDD and ST/STS/STD instructions. - Use internal RAM for stack pointer. 6. EEPROM read from application code ...

  • Page 34

    Non-Read-While-Write area of flash not functional The Non-Read-While-Write area of the flash is not working as expected. The problem is related to the speed of the part when reading the flash of this area. Problem Fix/Workaround - Only use ...

  • Page 35

    Problem Fix/Workaround Do not set Lock Bit Protection Mode 3 when the application code needs to read from EEPROM. 2549NS–AVR–05/11 ATmega640/1280/1281/2560/2561 35 ...

  • Page 36

    Datasheet Revision History Please note that the referring page numbers in this section are referring to this document.The referring revision in this section are referring to the document revision. 12.1 Rev. 2549N-05/ ...

  • Page 37

    Rev. 2549K-01/ 10. 12.5 Rev. 2549J-09/ 12.6 Rev. 2549I-07/ 12.7 Rev. 2549H-06/ 2549NS–AVR–05/11 ATmega640/1280/1281/2560/2561 Updated ...

  • Page 38

    Rev. 2549G-06/ 10. 12.9 Rev. 2549F-04/ 12.10 Rev. 2549E-04/ 12.11 Rev. 2549D-12/ ...

  • Page 39

    Rev. 2549C-09/ 12.13 Rev. 2549B-05/ 12.14 Rev. 2549A-03/05 1. 2549NS–AVR–05/11 ATmega640/1280/1281/2560/2561 Updated Speed Grade in section “Features” on page Added “Resources” on page 11. Updated “SPI – ...

  • Page 40

    ... Atmel , Atmel logo and combinations thereof, AVR marks of Atmel Corporation or its subsidiaries. Windows other countries. Other terms and product names may be trademarks of others. Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN THE ATMEL ...