ATmega1284PR231 Atmel Corporation, ATmega1284PR231 Datasheet - Page 108

• Manufacturer Part Number: ATmega1284PR231
• Manufacturer: Atmel Corporation

Specifications of ATmega1284PR231

• Flash (kbytes): 128 Kbytes
• Max. Operating Frequency: 20 MHz
• Max I/o Pins: 32
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Crypto Engine: AES
• Sram (kbytes): 16
• Eeprom (bytes): 4096
• Operating Voltage (vcc): 1.8 to 3.6
• Timers: 3
• Frequency Band: 2.4 GHz
• Max Data Rate (mb/s): 2
• Antenna Diversity: Yes
• External Pa Control: Yes
• Power Output (dbm): 3
• Receiver Sensitivity (dbm): -101
• Receive Current Consumption (ma): 13.2
• Transmit Current Consumption (ma): 14.4
• Link Budget (dbm): 104

9.3.2
Figure 9-4.
8111C–MCU Wireless–09/09
Frame
Duration
Access
0
User accessible Frame Content
AT86RF231 Frame Structure
Preamble Sequence
SHR not accesible
4 octets / 128 µs
PHY generated
Length [octets]
The AT86RF231 supports an IEEE 802.15.4 compliant frame format as shown in
page
Notes:
A frame comprises two sections, the radio transceiver internally generated SHR field and the
user accessible part stored in the Frame Buffer. The SHR contains the preamble and the SFD
field. The variable frame section contains the PHR and the PSDU including the FCS, see
tion 8.2 “Frame Check Sequence (FCS)” on page
The Frame Buffer content differs depending on the direction of the communication (receive or
transmit). To access the data follow the procedures described in
Access Mode” on page
During frame reception, the payload and the link quality indicator (LQI) value of a successfully
received frame are stored in the Frame Buffer. The radio transceiver appends the LQI value to
the frame data after the last received octet. The frame length information is not stored in the
Frame Buffer. When using the Frame Buffer access mode to read the Frame Buffer content, the
frame length information is placed before the payload.
If the SRAM read access is used to read an RX frame, the frame length field (PHR) cannot be
accessed. The SHR (except the SFD used to generate the SHR) can generally not be read by
the microcontroller.
For frame transmission, the PHR and the PSDU needs to be stored in the Frame Buffer. The
PHR byte is the first byte in the Frame Buffer and must be calculated based on the PHR and the
PSDU. The maximum frame size supported by the radio transceiver is 128 bytes. If the
TX_AUTO_CRC_ON bit is set in register 0x05 (PHY_TX_PWR), the FCS field of the PSDU is
replaced by the automatically calculated FCS during frame transmission. That's why there is no
need to write the FCS field when using the automatic FCS generation.
To manipulate individual bytes of the Frame Buffer a SRAM write access can be used instead.
For non IEEE 802.15.4 compliant frames, the minimum frame length supported by the radio
transceiver is one byte (Frame Length Field + 1 byte of data).
108.
1. Stored into Frame Buffer for TX operation
2. Stored into Frame Buffer during frame reception.
4
SFD
1
20.
5
PHR
(1)
6
TX: Frame Buffer content
Payload
n octets / n • 32 µs (n <= 128)
85.
RX: Frame Buffer content
n + 3
Section 6.2.2 “Frame Buffer
FCS
AT86RF231
n + 5
Figure 9-4 on
LQI
1
(2)
n + 6
Sec-
108