ATmega1284PR231 Atmel Corporation, ATmega1284PR231 Datasheet - Page 140

• Manufacturer Part Number: ATmega1284PR231
• Manufacturer: Atmel Corporation

Specifications of ATmega1284PR231

• Flash (kbytes): 128 Kbytes
• Max. Operating Frequency: 20 MHz
• Max I/o Pins: 32
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Crypto Engine: AES
• Sram (kbytes): 16
• Eeprom (bytes): 4096
• Operating Voltage (vcc): 1.8 to 3.6
• Timers: 3
• Frequency Band: 2.4 GHz
• Max Data Rate (mb/s): 2
• Antenna Diversity: Yes
• External Pa Control: Yes
• Power Output (dbm): 3
• Receiver Sensitivity (dbm): -101
• Receive Current Consumption (ma): 13.2
• Transmit Current Consumption (ma): 14.4
• Link Budget (dbm): 104

Figure 11-9. High Data Rate AACK Timing
11.3.6
8111C–MCU Wireless–09/09
Bit
+0x0C
Read/Write
Reset Value
AACK_ACK_TIME = 0
AACK_ACK_TIME = 1
Register Description
RX_SAFE_MODE
R/W
0
7
0
If register bit AACK_ACK_TIME (register 0x17, XAH_CTRL_1) is set the acknowledgment time
is reduced from 192 µs to 32 µs.
Register 0x0C (TRX_CTRL_2):
The TRX_CTRL_2 register controls the data rate setting
• Bit 7 - RX_SAFE_MODE
Refer to
• Bit [6:2] - Reserved
• Bit [1:0] - OQPSK_DATA_RATE
A write access to these register bits sets the OQPSK PSDU data rate used by the radio trans-
ceiver. The reset value OQPSK_DATA_RATE = 0 is the PSDU data rate according to
IEEE 802.15.4.
Table 11-9.
Register Bits
OQPSK_DATA_RATE
6
R
0
192
Section 11.8.2 “Register Description” on page
PSDU: 80 octets
PSDU: 80 octets
OQPSK Data Rate
5
R
0
Reserved
4
Value
R
0
0
1
2
3
512
3
R
0
OQPSK Data Rate
544
1000 kb/s
2000 kb/s
250 kb/s
500 kb/s
192 µs
32 µs
2
R
0
704
154.
ACK
Comment
IEEE 802.15.4 compliant
R/W
1
0
OQPSK_DATA_RATE
916
ACK
AT86RF231
R/W
0
0
TRX_CTRL_2
time [µs]
140