ATmega1284PR231 Atmel Corporation, ATmega1284PR231 Datasheet - Page 141

• Manufacturer Part Number: ATmega1284PR231
• Manufacturer: Atmel Corporation

Specifications of ATmega1284PR231

• Flash (kbytes): 128 Kbytes
• Max. Operating Frequency: 20 MHz
• Max I/o Pins: 32
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Crypto Engine: AES
• Sram (kbytes): 16
• Eeprom (bytes): 4096
• Operating Voltage (vcc): 1.8 to 3.6
• Timers: 3
• Frequency Band: 2.4 GHz
• Max Data Rate (mb/s): 2
• Antenna Diversity: Yes
• External Pa Control: Yes
• Power Output (dbm): 3
• Receiver Sensitivity (dbm): -101
• Receive Current Consumption (ma): 13.2
• Transmit Current Consumption (ma): 14.4
• Link Budget (dbm): 104

8111C–MCU Wireless–09/09
Bit
+0x17
Read/Write
Reset Value
R/W
7
0
Reserved
6
R
0
Register 0x17 (XAH_CTRL_1):
The XAH_CTRL_1 register is a multi-purpose control register for various RX_AACK settings.
• Bit [7:6] - Reserved
• Bit 5 - AACK_FLTR_RES_FT
Refer to
• Bit 4 - AACK_UPLD_RES_FT
Refer to
• Bit 3 - Reserved
• Bit 2 - AACK_ACK_TIME
According to IEEE 802.15.4, section 7.5.6.4.2 the transmission of an acknowledgment frame
shall commence 12 symbol periods (aTurnaroundTime) after the reception of the last symbol of
a data or MAC command frame. This is fulfilled with the reset value of the register bit [2]
(AACK_ACK_TIME).
If AACK_ACK_TIME = 1 an acknowledgment frame is sent 32 µs after the reception of the last
symbol of a data or MAC command frame. This may be applied to proprietary networks including
networks using the High Data Rate Modes to improve the overall data throughput.
• Bit 1 - AACK_PROM_MODE
Refer to
• Bit 0 - Reserved
AACK_FLTR_RES_FT
Section 7.2.7 “Register Description - Control Registers” on page
Section 7.2.7 “Register Description - Control Registers” on page
R/W
7.2.7 “Register Description - Control Registers” on page
5
1
AACK_UPLD_RES_FT
R/W
4
0
Reserved
3
R
0
AACK_ACK_TIME
R/W
2
0
AACK_PROM_MODE
R/W
68.
1
0
68.
68.
AT86RF231
Reserved
0
R
0
XAH_CTRL_1
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