ATmega1284PR231 Atmel Corporation, ATmega1284PR231 Datasheet - Page 148

• Manufacturer Part Number: ATmega1284PR231
• Manufacturer: Atmel Corporation

Specifications of ATmega1284PR231

• Flash (kbytes): 128 Kbytes
• Max. Operating Frequency: 20 MHz
• Max I/o Pins: 32
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Crypto Engine: AES
• Sram (kbytes): 16
• Eeprom (bytes): 4096
• Operating Voltage (vcc): 1.8 to 3.6
• Timers: 3
• Frequency Band: 2.4 GHz
• Max Data Rate (mb/s): 2
• Antenna Diversity: Yes
• External Pa Control: Yes
• Power Output (dbm): 3
• Receiver Sensitivity (dbm): -101
• Receive Current Consumption (ma): 13.2
• Transmit Current Consumption (ma): 14.4
• Link Budget (dbm): 104

11.5.3
8111C–MCU Wireless–09/09
Bit
+0x04
Read/Write
Reset Value
Register Description
PA_EXT_EN
R/W
7
0
IRQ_2_EXT_EN
R/W
6
0
to the transmit frequency within 16 µs. The modulation starts 16 µs after the rising edge of
SLP_TR. During this time, the PA buffer and the internal PA are enabled.
The control of an external PA is done via differential pin pair DIG3/DIG4. DIG3 = H / DIG4 = L
indicates that the transmission starts and can be used to enable an external PA. The timing of
pins DIG3/DIG4 can be adjusted relative to the start of the frame and the activation of the inter-
nal PA buffer. This is controlled using register bits PA_BUF_LT and PA_LT. For details refer to
Section 9.2.4 “TX Power Ramping” on page
Register 0x04 (TRX_CTRL_1):
The TRX_CTRL_1 register is a multi purpose register to control various operating modes and
settings of the radio transceiver.
• Bit 7 - PA_EXT_EN
This register bit enables pin 1 (DIG3) and pin 2 (DIG4) to indicate the transmit state of the radio
transceiver.
Table 11-15. RF Front-End Control Pins
Note:
• Bit 6 - IRQ_2_EXT_EN
Refer to
• Bit 5 - TX_AUTO_CRC_ON
Refer to
• Bit 4 - RX_BL_CTRL
Refer to
• Bit [3:2] - SPI_CMD_MODE
Refer to
PA_EXT_EN
1
TX_AUTO_CRC_ON
0
(1)
1. It is recommended to set PA_EXT_EN = 1 only in receive or transmit states to reduce the
Section 11.6 “RX Frame Time Stamping” on page
Section 8.2 “Frame Check Sequence (FCS)” on page
Section 11.7 “Frame Buffer Empty Indicator” on page
Section 6.3 “Radio Transceiver Status information” on page
power consumption or avoid leakage current of external RF switches or other building blocks,
especially during SLEEP state.
R/W
5
1
TX_BUSY
State
Other
n/a
RX_BL_CTRL
R/W
4
0
DIG3
DIG4
DIG3
DIG4
DIG3
DIG4
Pin
3
SPI_CMD_MODE
R/W
104.
0
Value
H
H
L
L
L
L
2
Description
External RF front-end control disabled
External RF front-end control enabled
150.
IRQ_MASK_MODE
152.
85.
R/W
1
0
24.
IRQ_POLARITY
AT86RF231
R/W
0
0
TRX_CTRL_1
148