ATmega1284PR231 Atmel Corporation, ATmega1284PR231 Datasheet - Page 170

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ATmega1284PR231

Manufacturer Part Number
ATmega1284PR231
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega1284PR231

Flash (kbytes)
128 Kbytes
Max. Operating Frequency
20 MHz
Max I/o Pins
32
Spi
3
Twi (i2c)
1
Uart
2
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Crypto Engine
AES
Sram (kbytes)
16
Eeprom (bytes)
4096
Operating Voltage (vcc)
1.8 to 3.6
Timers
3
Frequency Band
2.4 GHz
Max Data Rate (mb/s)
2
Antenna Diversity
Yes
External Pa Control
Yes
Power Output (dbm)
3
Receiver Sensitivity (dbm)
-101
Receive Current Consumption (ma)
13.2
Transmit Current Consumption (ma)
14.4
Link Budget (dbm)
104
Table 14-1.
Notes:
8111C–MCU Wireless–09/09
0x2D
0x2E
0x2F
....
Address
0x0A
0x0B
0x0C
0x0D
0x0E
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
0x0F
CSMA_SEED_0
CSMA_SEED_1
CSMA_BE
1. While the reset value of register 0x10 is 0x00, any practical access to the register is only possible when DVREG is active. So
2. While the reset value of register 0x11 is 0x02, any practical access to the register is only possible when BATMON is acti-
3. While the reset value of register 0x30 is 0x00, any practical access to the register is only possible when the radio transceiver
-
this register is normally always read out as 0x04. For details refer to
page
vated. So this register is normally always read out as 0x22 in P_ON state. For details refer to
(BATMON)” on page
is accessible. So the register is normally read out as:
Reset Value
Register Summary - Reset Values
110.
AACK_FVN_MODE[1]
CSMA_SEED_0[7]
0xC0
0xFF
0x2B
0xC7
0xB7
0xA7
0x00
0x00
0x00
0x19
0x20
0x00
0x00
0x03
0x00
0x00
MAX_BE[3]
-
The reset values of the AT86RF231 registers in state P_ON
page
Note:
a) 0x11 after a reset in P_ON state
b) 0x07 after a reset in any other state
AACK_FVN_MODE[0]
CSMA_SEED_0[6]
113.
MAX_BE[2]
170.
Address
-
0x1C
0x1D
0x1A
0x1B
0x1E
0x1F
0x10
0x11
0x12
0x13
0x14
0x15
0x16
0x17
0x18
0x19
All reset values in
cedure (/RST = L) as described in
of selected registers (e.g. registers 0x01, 0x10, 0x11, 0x30) can differ from that in
page
170.
CSMA_SEED_0[5]
AACK_SET_PD
Reset Value
MAX_BE[1]
-
0x00
0x02
0xF0
0x00
0x00
0x00
0x00
0x00
0x58
0x55
0x57
0x20
0x03
0x02
0x1F
0x00
Table 14-1 on page 170
(1)
(2)
CSMA_SEED_0[4]
AACK_DIS_ACK
MAX_BE[0]
-
Address
0x2A
0x2B
0x2C
0x2D
0x2E
0x20
0x21
0x22
0x23
0x24
0x25
0x26
0x27
0x28
0x29
0x2F
Section 7.1.4.5 “Reset Procedure” on page 41
AACK_I_AM_COORD
CSMA_SEED_0[3]
MIN_BE[3]
Section 9.4 “Voltage Regulators (AVREG, DVREG)” on
-
are only valid after a power on reset. After a reset pro-
Reset Value
0xEA
0xFF
0xFF
0xFF
0xFF
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x38
0x42
0x53
CSMA_SEED_0[2]
CSMA_SEED_1[2]
MIN_BE[2]
-
(1, 2, 3)
are shown in
Address
CSMA_SEED_0[1]
CSMA_SEED_1[1]
Section 9.5 “Battery Monitor
0x3A
0x3B
0x3C
0x3D
0x3E
0x30
0x31
0x32
0x34
0x34
0x35
0x36
0x37
0x38
0x39
0x3F
MIN_BE[1]
-
AT86RF231
CSMA_SEED_0[0]
CSMA_SEED_1[0]
the reset values
Table 14-1 on
Reset Value
Table 14-1 on
MIN_BE[0]
0x00
-
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x40
0x00
0x00
0x00
0x00
0x00
0x00
(3)
170
68
68
68

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