ATmega1284PR231 Atmel Corporation, ATmega1284PR231 Datasheet - Page 3

• Manufacturer Part Number: ATmega1284PR231
• Manufacturer: Atmel Corporation

Specifications of ATmega1284PR231

• Flash (kbytes): 128 Kbytes
• Max. Operating Frequency: 20 MHz
• Max I/o Pins: 32
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Crypto Engine: AES
• Sram (kbytes): 16
• Eeprom (bytes): 4096
• Operating Voltage (vcc): 1.8 to 3.6
• Timers: 3
• Frequency Band: 2.4 GHz
• Max Data Rate (mb/s): 2
• Antenna Diversity: Yes
• External Pa Control: Yes
• Power Output (dbm): 3
• Receiver Sensitivity (dbm): -101
• Receive Current Consumption (ma): 13.2
• Transmit Current Consumption (ma): 14.4
• Link Budget (dbm): 104

1.1
8111C–MCU Wireless–09/09
Table 1-1.
Pins
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
1
2
3
4
5
6
7
8
9
Pin Descriptions
Name
DIG3
DIG4
AVSS
RFP
RFN
AVSS
DVSS
/RST
DIG1
DIG2
SLP_TR
DVSS
DVDD
DVDD
DEVDD
DVSS
CLKM
DVSS
SCLK
MISO
DVSS
MOSI
/SEL
IRQ
XTAL2
XTAL1
AVSS
EVDD
Pin Description AT86RF231
Type
Digital output (Ground)
Digital output (Ground)
Ground
RF I/O
RF I/O
Ground
Ground
Digital input
Digital output (Ground)
Digital output (Ground)
Digital input
Ground
Supply
Supply
Supply
Ground
Digital output
Ground
Digital input
Digital output
Ground
Digital input
Digital input
Digital output
Analog input
Analog input
Ground
Supply
Description
1. RX/TX Indicator, see
2.
1. RX/TX indicator (DIG3 inverted), see
2. If disabled, pull-down enabled (AVSS)
Ground for RF signals
Differential RF signal
Differential RF signal
Ground for RF signals
Digital ground
Chip reset; active low
1. Antenna Diversity RF switch control, see
2. If disabled, pull-down enabled (DVSS)
1. Antenna Diversity RF switch control (DIG1 inverted), see
2. Signal IRQ_2 (RX_START) for RX Frame Time Stamping, see
3. If functions disabled, pull-down enabled (DVSS)
Controls sleep, transmit start, receive states; active high, see
Digital ground
Regulated 1.8V voltage regulator; digital domain, see
Regulated 1.8V voltage regulator; digital domain, see
External supply voltage; digital domain
Digital ground
Master clock signal output; low if disabled, see
Digital ground
SPI clock
SPI data output (Master Input Slave Output)
Digital ground
SPI data input (Master Output Slave Input)
SPI select, active low
1. Interrupt request signal; active high or active low; configurable
2. Frame Buffer Empty Indicator; active high, see
Crystal pin, see
Crystal pin or external clock supply, see
Analog ground
External supply voltage, analog domain
If disabled, pull-down enabled (AVSS)
Section 9.6
Section 11.5
Section 11.5
Section 9.6
Section 11.4
Section 9.6
Section 11.7
Section 9.4
Section 9.4
Section 11.4
AT86RF231
Section 6.5
Section 11.6
3