ATmega1284PR231 Atmel Corporation, ATmega1284PR231 Datasheet - Page 42

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ATmega1284PR231

Manufacturer Part Number
ATmega1284PR231
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega1284PR231

Flash (kbytes)
128 Kbytes
Max. Operating Frequency
20 MHz
Max I/o Pins
32
Spi
3
Twi (i2c)
1
Uart
2
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Crypto Engine
AES
Sram (kbytes)
16
Eeprom (bytes)
4096
Operating Voltage (vcc)
1.8 to 3.6
Timers
3
Frequency Band
2.4 GHz
Max Data Rate (mb/s)
2
Antenna Diversity
Yes
External Pa Control
Yes
Power Output (dbm)
3
Receiver Sensitivity (dbm)
-101
Receive Current Consumption (ma)
13.2
Transmit Current Consumption (ma)
14.4
Link Budget (dbm)
104
7.1.4.6
Table 7-1.
8111C–MCU Wireless–09/09
No
1
2
3
4
5
6
7
8
9
Symbol
t
t
t
t
t
t
t
t
t
TR1
TR2
TR3
TR4
TR5
TR6
TR7
TR8
TR9
State Transition Timing Summary
State Transition Timing
P_ON
SLEEP
TRX_OFF
TRX_OFF
PLL_ON
TRX_OFF
RX_ON
PLL_ON
RX_ON
Transition
/RST = L sets all registers to their default values. Exceptions are register bits CLKM_CTRL (reg-
ister 0x03, TRX_CTRL_0), refer to
117.
After releasing the reset pin (/RST = H) the wake-up sequence including an FTN calibration
cycle is performed, refer to
the TRX_OFF state is entered.
Figure 7-7 on page 41
transceiver was not in SLEEP state.
The reset procedure is identical for all originating radio transceiver states except of state P_ON
and SLEEP state. Instead, here the procedure described in
after VDD” on page 34
If the radio transceiver was in SLEEP state, the XOSC and DVREG are enabled before entering
TRX_OFF state.
If register TRX_STATUS indicates STATE_TRANSITION_IN_PROGRESS during system initial-
ization until the AT86RF231 reaches TRX_OFF, do not try to initiate a further state change while
the radio transceiver is in this state.
Notes
The transition numbers correspond to
if not otherwise stated. See measurement setup in
• The reset impulse should have a minimum length t
• An access to the device should not occur earlier than t
• A reset overrides an SPI command request that might be queued.
“Digital Interface Timing Characteristics” on page
/RST; refer to
12.4.14.
until CLKM
available
TRX_OFF
SLEEP
PLL_ON
TRX_OFF
RX_ON
TRX_OFF
RX_ON
PLL_ON
Section 12.4 “Digital Interface Timing Characteristics” on page
Time [µs], (type)
illustrates the reset procedure once the P_ON state was left and the radio
must be followed to enter the TRX_OFF state.
35*1/f
330
380
110
110
Section 9.8 “Automatic Filter Tuning (FTN)” on page
1
1
1
1
CLKM
Section 9.6.4 “Master Clock Signal Output (CLKM)” on page
Figure 7-1 on page 33
Comments
Depends on external capacitor at DVDD (1 µF nom) and crystal
oscillator setup (CL = 10 pF)
Depends on external capacitor at DVDD (1 µF nom) and crystal
oscillator setup (CL = 10 pF)
TRX_OFF state indicated by IRQ_4 (AWAKE_END)
For f
Depends on external capacitor at AVDD (1 µF nom)
Depends on external capacitor at AVDD (1 µF nom)
Transition time is also valid for TX_ARET_ON, RX_AACK_ON
CLKM
> 250 kHz
Figure 5-1 on page
157, see parameter 12.4.13.
10
= 625 ns as specified in
11
Section 7.1.2.1 “P_ON - Power-On
and do not include SPI access time
625 ns after releasing the pin
12.
AT86RF231
157, parameter
Section 12.4
125. After that
42

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