ATmega1284PR231 Atmel Corporation, ATmega1284PR231 Datasheet - Page 61

• Manufacturer Part Number: ATmega1284PR231
• Manufacturer: Atmel Corporation

Specifications of ATmega1284PR231

• Flash (kbytes): 128 Kbytes
• Max. Operating Frequency: 20 MHz
• Max I/o Pins: 32
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Crypto Engine: AES
• Sram (kbytes): 16
• Eeprom (bytes): 4096
• Operating Voltage (vcc): 1.8 to 3.6
• Timers: 3
• Frequency Band: 2.4 GHz
• Max Data Rate (mb/s): 2
• Antenna Diversity: Yes
• External Pa Control: Yes
• Power Output (dbm): 3
• Receiver Sensitivity (dbm): -101
• Receive Current Consumption (ma): 13.2
• Transmit Current Consumption (ma): 14.4
• Link Budget (dbm): 104

7.2.3.5
8111C–MCU Wireless–09/09
Frame Filtering
Frame Filtering is an evaluation whether or not a received frame is dedicated for this node. To
accept a received frame and to generate an address match interrupt IRQ_5 (AMI) a filtering pro-
cedure as described in IEEE 802.15.4-2006, section 7.5.6.2 (Third level of filtering) is applied to
the frame. The AT86RF231 RX_AACK mode accepts only frames that satisfy all of the following
requirements (quote from IEEE 802.15.4-2006, section 7.5.6.2):
Address match, indicated by interrupt IRQ_5 (AMI), is further controlled by the content of sub-
fields of the frame control field of a received frame according to the following rule:
If (Destination Addressing Mode = 0 OR 1) AND (Source Addressing Mode = 0) no IRQ_5 (AMI)
is generated, refer to
causes all acknowledgement frames not to be announced, which otherwise always pass the fil-
ter, regardless of whether they are intended for this device or not.
For backward compatibility to IEEE 802.15.4-2003 third level filter rule 2 (Frame Version) can be
disabled by register bits AACK_FVN_MODE (register 0x2E, CSMA_SEED_1).
Frame filtering is available in Extended and Basic Operating Mode, refer to
Operating Mode” on page
enabled.
Notes
1.
2.
3.
4.
5.
6.
The AT86RF231 requires satisfying two additional rules:
7.
8.
• Filter rule 1 is affected by register bits AACK_FLTR_RES_FT and AACK_UPLD_RES_FT,
• Filter rule 2 is affected by register bits AACK_FVN_MODE,
Section 7.2.7 “Register Description - Control Registers” on page
Description - Control Registers” on page
The Frame Type subfield shall not contain a reserved frame type.
The Frame Version subfield shall not contain a reserved value.
If a destination PAN identifier is included in the frame, it shall match macPANId or shall
be the broadcast PAN identifier (0xFFFF).
If a short destination address is included in the frame, it shall match either
macShortAddress or the broadcast address (0xFFFF). Otherwise, if an extended
destination address is included in the frame, it shall match aExtendedAddress.
If the frame type indicates that the frame is a beacon frame, the source PAN identifier
shall match macPANId unless macPANId is equal to 0xFFF, in which case the beacon
frame shall be accepted regardless of the source PAN identifier.
If only source addressing fields are included in a data or MAC command frame, the
frame shall be accepted only if the device is the PAN coordinator and the source PAN
identifier matches macPANId.
The frame type indicates that the frame is not an ACK frame (refer to
82).
At least one address field must be configured.
Section 8.1.2.2 “Frame Control Field (FCF)” on page
33, a frame passing the frame filtering generates an IRQ_5 (AMI), if
68.
Section 7.2.7 “Register
68.
AT86RF231
Table 8-4 on page
80. This effectively
Section 7.1 “Basic
61