ATmega1284PR231 Atmel Corporation, ATmega1284PR231 Datasheet - Page 66

• Manufacturer Part Number: ATmega1284PR231
• Manufacturer: Atmel Corporation

Specifications of ATmega1284PR231

• Flash (kbytes): 128 Kbytes
• Max. Operating Frequency: 20 MHz
• Max I/o Pins: 32
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Crypto Engine: AES
• Sram (kbytes): 16
• Eeprom (bytes): 4096
• Operating Voltage (vcc): 1.8 to 3.6
• Timers: 3
• Frequency Band: 2.4 GHz
• Max Data Rate (mb/s): 2
• Antenna Diversity: Yes
• External Pa Control: Yes
• Power Output (dbm): 3
• Receiver Sensitivity (dbm): -101
• Receive Current Consumption (ma): 13.2
• Transmit Current Consumption (ma): 14.4
• Link Budget (dbm): 104

Figure 7-13. Example Timing of a TX_ARET Transaction
8111C–MCU Wireless–09/09
FrameType
TRX_STATE
RX/TX
SLP_TR
IRQ
Typ. Processing Delay
TX_ARET_ON
0
Table 7-12.
Note that if no ACK is expected (according to the content of the received frame in the Frame
Buffer), the radio transceiver issues IRQ_3 (TRX_END) directly after the frame transmission has
been completed. The value of register bits TRAC_STATUS (register 0x02, TRX_STATE) is set
to SUCCESS.
A value of MAX_CSMA_RETRIES = 7 initiates an immediate TX_ARET transaction without per-
forming CSMA-CA. This is required to support slotted acknowledgement operation. Further the
value MAX_FRAME_RETRIES is ignored and the TX_ARET transaction is performed only once.
A timing example of a TX_ARET transaction is shown in
Note:
Here an example data frame of length 10 with an ACK request is transmitted, see
page
response. During the whole transaction including frame transmit, wait for ACK and ACK receive
the radio transceiver status register TRX_STATUS (register 0x01, TRX_STATUS) signals
BUSY_TX_ARET.
A successful reception of the acknowledgment frame is indicated by IRQ_3 (TRX_END). The
status register TRX_STATUS (register 0x01, TRX_STATUS) changes back to TX_ARET_ON.
The TX_ARET status register TRAC_STATUS changes as well to TRAC_STATUS = SUCCESS
CSMA-CA
Value
t
CSMA-CA
0
1
3
5
7
67. After that the AT86RF231 switches to receive mode and expects an acknowledgement
128
t
CSMA-CA
Name
SUCCESS
SUCCESS_DATA_PENDING
CHANNEL_ACCESS_FAILURE
NO_ACK
INVALID
16 µs
Data Frame (Length = 10, ACK=1)
Interpretation of TRAC_STATUS register bits
defines the random CSMA-CA processing time
TX
TX
BUSY_TX_ARET
672
32 µs
Description
The transaction was responded by a valid ACK, or, if no
ACK is requested, after a successful frame transmission
Equivalent to SUCCESS, indicates pending frame data
according to the MHR frame control field of the received
ACK response
Channel is still busy after MAX_CSMA_RETRIES of
CSMA-CA
No acknowledgement frames were received during all retry
attempts
Entering TX_ARET mode sets TRAC_STATUS = 7
x
Figure 7-13 on page
RX
RX
ACK Frame
x+352
AT86RF231
TRX_END
TX_ARET_ON
t
66.
IRQ
time [µs]
Table 7-13 on
66