ATmega1284RZAP Atmel Corporation, ATmega1284RZAP Datasheet - Page 270

• Manufacturer Part Number: ATmega1284RZAP
• Manufacturer: Atmel Corporation

Specifications of ATmega1284RZAP

• Flash (kbytes): 128 Kbytes
• Max. Operating Frequency: 20 MHz
• Max I/o Pins: 32
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Crypto Engine: No
• Sram (kbytes): 16
• Eeprom (bytes): 4096
• Operating Voltage (vcc): 1.8 to 3.6
• Timers: 3
• Frequency Band: 2.4 GHz
• Max Data Rate (mb/s): 0.25
• Antenna Diversity: No
• External Pa Control: No
• Power Output (dbm): 3
• Receiver Sensitivity (dbm): -101
• Receive Current Consumption (ma): 16.0
• Transmit Current Consumption (ma): 17.0
• Link Budget (dbm): 104

8059D–AVR–11/09
The Boundary-scan logic is not included in the figures in the datasheet.
simple digital port pin as described in the section
details from
When no alternate port function is present, the Input Data - ID - corresponds to the PINxn Regis-
ter value (but ID has no synchronizer), Output Data corresponds to the PORT Register, Output
Control corresponds to the Data Direction - DD Register, and the Pull-up Enable - PUExn - cor-
responds to logic expression PUD · DDxn · PORTxn.
Digital alternate port functions are connected outside the dotted box in
scan chain read the actual pin value. For analog function, there is a direct connection from the
external pin to the analog circuit. There is no scan chain on the interface between the digital and
the analog circuitry, but some digital control signal to analog circuitry are turned off to avoid driv-
ing contention on the pads.
When JTAG IR contains EXTEST or SAMPLE_PRELOAD the clock is not sent out on the port
pins even if the CKOUT fuse is programmed. Even though the clock is output when the JTAG IR
contains SAMPLE_PRELOAD, the clock is not sampled by the boundary scan.
Figure 23-3. Boundary-scan Cell for Bi-directional Port Pin with Pull-up Function.
Pull-up Enable (PUE)
Output Control (OC)
Output Data (OD)
Input Data (ID)
Figure 23-3
replaces the dashed box in
0
1
From Last Cell
0
1
0
1
ShiftDR
ClockDR
D
D
FF1
FF0
To Next Cell
Q
Q
”I/O-Ports” on page
UpdateDR
Figure
D
G
D
G
LD1
LD0
23-4.
Q
Q
0
1
0
1
0
1
ATmega1284P
EXTEST
Figure 23-4
70. The Boundary-scan
Figure 23-4
Vcc
to make the
shows a
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