ATmega1284RZAP Atmel Corporation, ATmega1284RZAP Datasheet - Page 36

• Manufacturer Part Number: ATmega1284RZAP
• Manufacturer: Atmel Corporation

Specifications of ATmega1284RZAP

• Flash (kbytes): 128 Kbytes
• Max. Operating Frequency: 20 MHz
• Max I/o Pins: 32
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Crypto Engine: No
• Sram (kbytes): 16
• Eeprom (bytes): 4096
• Operating Voltage (vcc): 1.8 to 3.6
• Timers: 3
• Frequency Band: 2.4 GHz
• Max Data Rate (mb/s): 0.25
• Antenna Diversity: No
• External Pa Control: No
• Power Output (dbm): 3
• Receiver Sensitivity (dbm): -101
• Receive Current Consumption (ma): 16.0
• Transmit Current Consumption (ma): 17.0
• Link Budget (dbm): 104

7.9
7.10
7.11
8059D–AVR–11/09
Timer/Counter Oscillator
Clock Output Buffer
System Clock Prescaler
Table 7-16.
When applying an external clock, it is required to avoid sudden changes in the applied clock fre-
quency to ensure stable operation of the MCU. A variation in frequency of more than 2% from
one clock cycle to the next can lead to unpredictable behavior. If changes of more than 2% is
required, ensure that the MCU is kept in Reset during the changes.
Note that the System Clock Prescaler can be used to implement run-time changes of the internal
clock frequency while still ensuring stable operation. Refer to
36
ATmega1284P uses the same type of crystal oscillator for Low-frequency Crystal Oscillator and
Timer/Counter Oscillator. See
oscillator and crystal requirements.
The device can operate its Timer/Counter2 from an external 32.768 kHz watch crystal or a exter-
nal clock source. See
Applying an external clock source to TOSC1 can be done if EXTCLK in the ASSR Register is
written to logic one. See
uously compared with the counter value (TCNT2). A match can be used to generate an Output
Compare interrupt, or to generate a waveform output on the OC2B pin.” on page 158
description on selecting external clock as input instead of a 32.768 kHz watch crystal.
The device can output the system clock on the CLKO pin. To enable the output, the CKOUT
Fuse has to be programmed. This mode is suitable when the chip clock is used to drive other cir-
cuits on the system. The clock also will be output during reset, and the normal operation of I/O
pin will be overridden when the fuse is programmed. Any clock source, including the internal RC
Oscillator, can be selected when the clock is output on CLKO. If the System Clock Prescaler is
used, it is the divided system clock that is output.
The ATmega1284P has a system clock prescaler, and the system clock can be divided by set-
ting the
the system clock frequency and the power consumption when the requirement for processing
power is low. This can be used with all clock source options, and it will affect the clock frequency
of the CPU and all synchronous peripherals. clk
factor as shown in
When switching between prescaler settings, the System Clock Prescaler ensures that no
glitches occurs in the clock system. It also ensures that no intermediate frequency is higher than
BOD enabled
Fast rising power
Slowly rising power
for details.
Power Conditions
”CLKPR – Clock Prescale Register” on page
Start-up Times for the External Clock Selection
Table 7-17 on page
”Clock Source Connections” on page 29
”The Output Compare Register B contains an 8-bit value that is contin-
Start-up Time from Power-
”Low Frequency Crystal Oscillator” on page 32
down and Power-save
Reserved
39.
6 CK
6 CK
6 CK
I/O
, clk
38. This feature can be used to decrease
ADC
, clk
Additional Delay from
”System Clock Prescaler” on page
CPU
Reset (V
for details.
14CK + 4.1 ms
14CK + 65 ms
, and clk
ATmega1284P
14CK
CC
= 5.0V)
FLASH
for details on the
are divided by a
for further
SUT1..0
00
01
10
11
36