ATmega128A Atmel Corporation, ATmega128A Datasheet - Page 19

• Manufacturer Part Number: ATmega128A
• Manufacturer: Atmel Corporation

Specifications of ATmega128A

• Flash (kbytes): 128 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 53
• Ext Interrupts: 8
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Uart: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 4
• Eeprom (bytes): 4096
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 4
• Output Compare Channels: 8
• Input Capture Channels: 2
• Pwm Channels: 7
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

8151HS–AVR–02/11
4. Stabilizing time needed when changing OSCCAL Register
5. IDCODE masks data from TDI input
6. Reading EEPROM by using ST or STS to set EERE bit triggers unexpected interrupt
NOP
NOP
NOP
NOP
NOP
SEI
After increasing the source clock frequency more than 2% with settings in the OSCCAL reg-
ister, the device may execute some of the subsequent instructions incorrectly.
Problem Fix / Workaround
The behavior follows errata number 3., and the same Fix / Workaround is applicable on this
errata.
The JTAG instruction IDCODE is not working correctly. Data to succeeding devices are
replaced by all-ones during Update-DR.
Problem Fix / Workaround
request.
Reading EEPROM by using the ST or STS command to set the EERE bit in the EECR reg-
ister triggers an unexpected EEPROM interrupt request.
Problem Fix / Workaround
Always use OUT or SBI to set EERE in EECR.
– If ATmega128A is the only device in the scan chain, the problem is not visible.
– Select the Device ID Register of the ATmega128A by issuing the IDCODE
– If the Device IDs of all devices in the boundary scan chain must be captured
instruction or by entering the Test-Logic-Reset state of the TAP controller to read out
the contents of its Device ID Register and possibly data from succeeding devices of
the scan chain. Issue the BYPASS instruction to the ATmega128A while reading the
Device ID Registers of preceding devices of the boundary scan chain.
simultaneously, the ATmega128A must be the fist device in the chain.
; no operation
; no operation
; no operation
; no operation
; no operation
; set global interrupt enable
ATmega128A
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