ATmega164P Automotive Atmel Corporation, ATmega164P Automotive Datasheet - Page 38

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ATmega164P Automotive

Manufacturer Part Number
ATmega164P Automotive
Description
Manufacturer
Atmel Corporation

Specifications of ATmega164P Automotive

Flash (kbytes)
16 Kbytes
Pin Count
44
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
32
Ext Interrupts
32
Usb Speed
No
Usb Interface
No
Spi
3
Twi (i2c)
1
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
1
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 125
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
6
Input Capture Channels
1
Pwm Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
8.9
8.9.1
38
Register Description
Atmel ATtiny24/44/84 [Preliminary]
MCUCR – MCU Control Register
The MCU Control Register contains control bits for power management.
• Bit 7 – BODS: BOD Sleep
In order to disable BOD during sleep (see
to logic one. This is controlled by a timed sequence and the enable bit, BODSE in MCUCR.
First, both BODS and BODSE must be set to one. Second, within four clock cycles, BODS
must be set to one and BODSE must be set to zero. The BODS bit is active three clock cycles
after it is set. A sleep instruction must be executed while BODS is active in order to turn off the
BOD for the actual sleep mode. The BODS bit is automatically cleared after three clock cycles.
• Bit 5 – SE: Sleep Enable
The SE bit must be written to logical one to make the MCU enter the sleep mode when the
SLEEP instruction is executed. To avoid the MCU entering the sleep mode unless it is the pro-
grammer's purpose, it is recommended to set the sleep enable (SE) bit just before the
execution of the SLEEP instruction and to clear it immediately after waking up.
• Bits 4, 3 – SM1..0: Sleep Mode Select Bits 2..0
These bits select between the three available sleep modes as shown in
Table 8-2.
Note:
• Bit 2 – BODSE: BOD Sleep Enable
The BODSE bit enables setting of BODS control bit, as explained on BODS bit description.
BOD disable is controlled by a timed sequence.
Bit
Read/Write
Initial Value
SM1
1. Only recommended with external crystal or resonator selected as clock source
0
0
1
1
Sleep Mode Select
BODS
R/W
7
0
PUD
R/W
SM0
6
0
0
1
0
1
R/W
SE
5
0
Sleep Mode
Idle
ADC Noise Reduction
Power-down
Standby
Table 8-1 on page
SM1
R/W
4
0
(1)
SM0
R/W
3
0
BODSE
R/W
34) the BODS bit must be written
2
0
ISC01
R/W
1
0
Table 8-2 on page
ISC00
R/W
0
0
7701E–AVR–02/11
MCUCR
38.

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