ATmega164PA Atmel Corporation, ATmega164PA Datasheet - Page 8

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ATmega164PA

Manufacturer Part Number
ATmega164PA
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega164PA

Flash (kbytes)
16 Kbytes
Pin Count
44
Max. Operating Frequency
20 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
32
Ext Interrupts
32
Usb Speed
No
Usb Interface
No
Spi
3
Twi (i2c)
1
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
1
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
6
Input Capture Channels
1
Pwm Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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2.3.6
2.3.7
2.3.8
2.3.9
2.3.10
2.3.11
8272CS–AVR–06/11
Port D (PD7:PD0)
RESET
XTAL1
XTAL2
AVCC
AREF
capability. As inputs, Port C pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port C pins are tri-stated when a reset condition becomes active,
even if the clock is not running.
Port C also serves the functions of the JTAG interface, along with special features of the
ATmega164A/164PA/324A/324PA/644A/644PA/1284/1284P as listed on
Port D is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port D output buffers have symmetrical drive characteristics with both high sink and source
capability. As inputs, Port D pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port D pins are tri-stated when a reset condition becomes active,
even if the clock is not running.
P o r t D a l s o s e r v e s t h e f u n c t i o n s o f v a r i o u s s p e c i a l f e a t u r e s o f t h e
ATmega164A/164PA/324A/324PA/644A/644PA/1284/1284P as listed on
Reset input. A low level on this pin for longer than the minimum pulse length will generate a
reset, even if the clock is not running. The minimum pulse length is given in
Characteristics” on page
Input to the inverting Oscillator amplifier and input to the internal clock operating circuit.
Output from the inverting Oscillator amplifier.
AVCC is the supply voltage pin for Port A and the Analog-to-digital Converter. It should be exter-
nally connected to V
to V
This is the analog reference pin for the Analog-to-digital Converter.
CC
through a low-pass filter.
ATmega164A/PA/324A/PA/644A/PA/1284/P
CC
, even if the ADC is not used. If the ADC is used, it should be connected
337. Shorter pulses are not guaranteed to generate a reset.
page
page
”System and Reset
85.
88.
8

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