ATmega165P Atmel Corporation, ATmega165P Datasheet - Page 254

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ATmega165P

Manufacturer Part Number
ATmega165P
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega165P

Flash (kbytes)
16 Kbytes
Pin Count
64
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
54
Ext Interrupts
17
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
1
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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24.5
8019K–AVR–11/10
Boot Loader Lock Bits
If no Boot Loader capability is needed, the entire Flash is available for application code. The
Boot Loader has two separate sets of Boot Lock bits which can be set independently. This gives
the user a unique flexibility to select different levels of protection.
The user can select:
• To protect the entire Flash from a software update by the MCU.
• To protect only the Boot Loader Flash section from a software update by the MCU.
• To protect only the Application Flash section from a software update by the MCU.
• Allow software update in the entire Flash.
See
be set in software and in Serial or Parallel Programming mode, but they can be cleared by a
Chip Erase command only. The general Write Lock (Lock Bit mode 2) does not control the pro-
gramming of the Flash memory by SPM instruction. Similarly, the general Read/Write Lock
(Lock Bit mode 1) does not control reading nor writing by LPM/SPM, if it is attempted.
Table 24-2.
Note:
Table 24-3.
Note:
BLB0 Mode
BLB1 Mode
Table 24-2
1
2
3
4
1
2
3
4
1. “1” means unprogrammed, “0” means programmed
1. “1” means unprogrammed, “0” means programmed
Boot Lock Bit0 Protection Modes (Application Section)
Boot Lock Bit1 Protection Modes (Boot Loader Section)
and
BLB02
BLB12
1
1
0
0
1
1
0
0
Table 24-3
BLB01
BLB11
1
0
0
1
1
0
0
1
for further details. The Boot Lock bits and general Lock bits can
Protection
No restrictions for SPM or LPM accessing the Application
section.
SPM is not allowed to write to the Application section.
SPM is not allowed to write to the Application section, and LPM
executing from the Boot Loader section is not allowed to read
from the Application section. If Interrupt Vectors are placed in
the Boot Loader section, interrupts are disabled while executing
from the Application section.
LPM executing from the Boot Loader section is not allowed to
read from the Application section. If Interrupt Vectors are placed
in the Boot Loader section, interrupts are disabled while
executing from the Application section.
Protection
No restrictions for SPM or LPM accessing the Boot Loader
section.
SPM is not allowed to write to the Boot Loader section.
SPM is not allowed to write to the Boot Loader section, and LPM
executing from the Application section is not allowed to read
from the Boot Loader section. If Interrupt Vectors are placed in
the Application section, interrupts are disabled while executing
from the Boot Loader section.
LPM executing from the Application section is not allowed to
read from the Boot Loader section. If Interrupt Vectors are
placed in the Application section, interrupts are disabled while
executing from the Boot Loader section.
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ATmega165P
254

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