ATmega165P Atmel Corporation, ATmega165P Datasheet - Page 36

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ATmega165P

Manufacturer Part Number
ATmega165P
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega165P

Flash (kbytes)
16 Kbytes
Pin Count
64
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
54
Ext Interrupts
17
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
1
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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8. Power Management and Sleep Modes
8.1
Table 8-1.
Notes:
8019K–AVR–11/10
Sleep
Mode
Idle
ADC NRM
Power-
down
Power-save
Standby
Sleep Modes
1. Only recommended with external crystal or resonator selected as clock source.
2. Timer/Counter2 is running in asynchronous mode.
3. For INT0, only level interrupt.
(1)
Active Clock Domains and Wake-up Sources in the Different Sleep Modes.
Active Clock Domains
Sleep modes enable the application to shut down unused modules in the MCU, thereby saving-
power. The AVR provides various sleep modes allowing the user to tailor the power
consumption to the application’s requirements.
Figure 7-1 on page 26
bution. The figure is helpful in selecting an appropriate sleep mode.
different sleep modes and their wake up sources.
To enter any of the sleep modes, the SE bit in SMCR must be written to logic one and a SLEEP
instruction must be executed. The SM2, SM1, and SM0 bits in the SMCR Register select which
sleep mode will be activated by the SLEEP instruction. See
summary.
If an enabled interrupt occurs while the MCU is in a sleep mode, the MCU wakes up. The MCU
is then halted for four cycles in addition to the start-up time, executes the interrupt routine, and
resumes execution from the instruction following SLEEP. The contents of the Register File and
SRAM are unaltered when the device wakes up from sleep. If a reset occurs during sleep mode,
the MCU wakes up and executes from the Reset Vector.
X
X
X
X
X
X
presents the different clock systems in the ATmega165P, and their distri-
X
X
X
Oscillators
X
X
X
(2)
(2)
X
X
X
X
X
(3)
(3)
(3)
(3)
X
X
X
X
X
Wake-up Sources
X
Table 8-2 on page 41
X
X
(2)
ATmega165P
Table 8-1
X
X
X
X
shows the
for a
X
36

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