ATmega168 Automotive Atmel Corporation, ATmega168 Automotive Datasheet - Page 119

• Manufacturer Part Number: ATmega168 Automotive
• Manufacturer: Atmel Corporation

Specifications of ATmega168 Automotive

• Flash (kbytes): 16 Kbytes
• Pin Count: 32
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 23
• Ext Interrupts: 24
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Twi (i2c): 1
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 1
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 150
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 6
• Input Capture Channels: 1
• Pwm Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

14.11.9
7701E–AVR–02/11
TIFR1 – Timer/Counter Interrupt Flag Register 1
• Bit 7,6,4,3 – Reserved Bit
This bit is reserved for future use. For ensuring compatibility with future devices, this bit must
be written to logical zero when the register is written.
• Bit 5– ICF1: Timer/Counter1, Input Capture Flag
This flag is set when a capture event occurs on the ICP1 pin. When the input capture register
(ICR1) is set by the WGM13:0 to be used as the top value, the ICF1 flag is set when the coun-
ter reaches the top value.
ICF1 is automatically cleared when the input capture interrupt vector is executed. Alterna-
tively, ICF1 can be cleared by writing a logical one to its bit location.
• Bit 2– OCF1B: Timer/Counter1, Output Compare B Match Flag
This flag is set in the timer clock cycle after the counter (TCNT1) value matches the output
compare register B (OCR1B).
Note that a forced output compare (1B) strobe will not set the OCF1B flag.
OCF1B is automatically cleared when the output compare match B interrupt vector is exe-
cuted. Alternatively, OCF1B can be cleared by writing a logical one to its bit location.
• Bit 1– OCF1A: Timer/Counter1, Output Compare A Match Flag
This flag is set in the timer clock cycle after the counter (TCNT1) value matches the output
compare register A (OCR1A).
Note that a forced output compare (1A) strobe will not set the OCF1A flag.
OCF1A is automatically cleared when the output compare match A interrupt vector is exe-
cuted. Alternatively, OCF1A can be cleared by writing a logical one to its bit location.
• Bit 0– TOV1: Timer/Counter1, Overflow Flag
The setting of this flag is dependent of the WGM13:0 bit settings. In normal and CTC modes,
the TOV1 flag is set when the timer overflows. See
behavior when using another WGM13:0 bit setting.
TOV1 is automatically cleared when the timer/counter 1 overflow interrupt vector is executed.
Alternatively, TOV1 can be cleared by writing a logical one to its bit location.
Bit
0x0B (0x2B)
Read/Write
Initial Value
–
R
7
0
–
R
6
0
Atmel ATtiny24/44/84 [Preliminary]
ICIF1
R/W
5
0
–
R
4
0
–
Table 14-4 on page 115
R
3
0
OCF1B
R/W
2
0
OCF1A
R/W
1
0
TOV1
for the TOV1 flag
R/W
0
0
TIFR1
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