ATmega168 Automotive Atmel Corporation, ATmega168 Automotive Datasheet - Page 41

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ATmega168 Automotive

Manufacturer Part Number
ATmega168 Automotive
Description
Manufacturer
Atmel Corporation

Specifications of ATmega168 Automotive

Flash (kbytes)
16 Kbytes
Pin Count
32
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
23
Ext Interrupts
24
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
1
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 150
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
6
Input Capture Channels
1
Pwm Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
9.3
7701E–AVR–02/11
Power-on Reset
Figure 9-1.
A Power-on Reset (POR) pulse is generated by an On-chip detection circuit. The detection
level is defined in
whenever V
Reset, as well as to detect a failure in supply voltage.
A POR circuit ensures that the device is reset from power-on. Reaching the power-on reset
threshold voltage invokes the delay counter, which determines how long the device is kept in
RESET after V
decreases below the detection level.
Figure 9-2.
INTERNAL
V
TIME-OUT
BODLEVEL [1..0]
CC
RESET
RESET
V
CC
CCRR
Reset Logic
MCU Start-up, RESET Tied to V
is below the detection level. The POR circuit can be used to trigger the Start-up
CC
“System and Reset Characterizations” on page
Pull-up Resistor
rise. The RESET signal is activated again, without any delay, when V
FILTER
SPIKE
V
V
V
RST
PORMA X
PORMIN
Atmel ATtiny24/44/84 [Preliminary]
t
TOUT
CKSEL[1:0]
Power-on Reset
Reset Circuit
SUT[1:0]
Brown-out
Watchdog
Oscillator
Generator
Circuit
Clock
CK
CC
Register (MCUSR)
MCU Status
DATA BUS
Delay Counters
181. The POR is activated
TIMEOUT
41
CC

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