ATmega168P

Manufacturer Part NumberATmega168P
ManufacturerAtmel Corporation
ATmega168P datasheets
 


Specifications of ATmega168P

Flash (kbytes)16 KbytesPin Count32
Max. Operating Frequency20 MHzCpu8-bit AVR
# Of Touch Channels16Hardware Qtouch AcquisitionNo
Max I/o Pins23Ext Interrupts24
Usb SpeedNoUsb InterfaceNo
Spi2Twi (i2c)1
Uart1Graphic LcdNo
Video DecoderNoCamera InterfaceNo
Adc Channels8Adc Resolution (bits)10
Adc Speed (ksps)15Analog Comparators1
Resistive Touch ScreenNoTemp. SensorYes
Crypto EngineNoSram (kbytes)1
Eeprom (bytes)512Self Program MemoryYES
Dram MemoryNoNand InterfaceNo
PicopowerYesTemp. Range (deg C)-40 to 85
I/o Supply Class1.8 to 5.5Operating Voltage (vcc)1.8 to 5.5
FpuNoMpu / Mmuno / no
Timers3Output Compare Channels6
Input Capture Channels1Pwm Channels6
32khz RtcYesCalibrated Rc OscillatorYes
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Page 79/420

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Table 14-2
ure 14-5 on page 78
generated internally in the modules having the alternate function.
Table 14-2.
Signal Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
PTOE
DIEOE
DIEOV
DI
AIO
The following subsections shortly describe the alternate functions for each port, and relate the
overriding signals to the alternate function. Refer to the alternate function description for further
details.
8025M–AVR–6/11
summarizes the function of the overriding signals. The pin and port indexes from
are not shown in the succeeding tables. The overriding signals are
Generic Description of Overriding Signals for Alternate Functions
Full Name
Description
If this signal is set, the pull-up enable is controlled by the PUOV
Pull-up Override
signal. If this signal is cleared, the pull-up is enabled when
Enable
{DDxn, PORTxn, PUD} = 0b010.
If PUOE is set, the pull-up is enabled/disabled when PUOV is
Pull-up Override
set/cleared, regardless of the setting of the DDxn, PORTxn,
Value
and PUD Register bits.
If this signal is set, the Output Driver Enable is controlled by the
Data Direction
DDOV signal. If this signal is cleared, the Output driver is
Override Enable
enabled by the DDxn Register bit.
If DDOE is set, the Output Driver is enabled/disabled when
Data Direction
DDOV is set/cleared, regardless of the setting of the DDxn
Override Value
Register bit.
If this signal is set and the Output Driver is enabled, the port
Port Value
value is controlled by the PVOV signal. If PVOE is cleared, and
Override Enable
the Output Driver is enabled, the port Value is controlled by the
PORTxn Register bit.
Port Value
If PVOE is set, the port value is set to PVOV, regardless of the
Override Value
setting of the PORTxn Register bit.
Port Toggle
If PTOE is set, the PORTxn Register bit is inverted.
Override Enable
Digital Input
If this bit is set, the Digital Input Enable is controlled by the
Enable Override
DIEOV signal. If this signal is cleared, the Digital Input Enable
Enable
is determined by MCU state (Normal mode, sleep mode).
Digital Input
If DIEOE is set, the Digital Input is enabled/disabled when
Enable Override
DIEOV is set/cleared, regardless of the MCU state (Normal
Value
mode, sleep mode).
This is the Digital Input to alternate functions. In the figure, the
signal is connected to the output of the Schmitt Trigger but
Digital Input
before the synchronizer. Unless the Digital Input is used as a
clock source, the module with the alternate function will use its
own synchronizer.
This is the Analog Input/output to/from alternate functions. The
Analog
signal is connected directly to the pad, and can be used bi-
Input/Output
directionally.
ATmega48P/88P/168P
Fig-
79