ATmega324A Atmel Corporation, ATmega324A Datasheet - Page 13

• Manufacturer Part Number: ATmega324A
• Manufacturer: Atmel Corporation

Specifications of ATmega324A

• Flash (kbytes): 32 Kbytes
• Pin Count: 44
• Max. Operating Frequency: 20 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 32
• Ext Interrupts: 32
• Usb Speed: No
• Usb Interface: No
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 2
• Eeprom (bytes): 1024
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 6
• Input Capture Channels: 1
• Pwm Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

Notes:
8272CS–AVR–06/11
0x1C (0x3C)
0x1B (0x3B)
0x1A (0x3A)
0x0E (0x2E)
0x0D (0x2D)
0x0C (0x2C)
0x0B (0x2B)
0x0A (0x2A)
0x19 (0x39)
0x18 (0x38)
0x17 (0x37)
0x16 (0x36)
0x15 (0x35)
0x14 (0x34)
0x13 (0x33)
0x12 (0x32)
0x11 (0x31)
0x10 (0x30)
0x0F (0x2F)
0x09 (0x29)
0x08 (0x28)
0x07 (0x27)
0x06 (0x26)
0x05 (0x25)
0x04 (0x24)
0x03 (0x23)
0x02 (0x22)
0x01 (0x21)
0x00 (0x20)
Address
1. For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O memory addresses
2. I/O registers within the address range $00 - $1F are directly bit-accessible using the SBI and CBI instructions. In these reg-
3. Some of the status flags are cleared by writing a logical one to them. Note that the CBI and SBI instructions will operate on
4. When using the I/O specific commands IN and OUT, the I/O addresses $00 - $3F must be used. When addressing I/O regis-
5. USART in SPI Master Mode.
6. Only available in the ATmega164PA/324PA/644PA/1284P.
should never be written.
isters, the value of single bits can be checked by using the SBIS and SBIC instructions.
all bits in the I/O register, writing a one back into any flag read as set, thus clearing the flag. The CBI and SBI instructions
work with registers 0x00 to 0x1F only.
ters as data space using LD and ST instructions, $20 must be added to these addresses.
The ATmega164A/164PA/324A/324PA/644A/644PA/1284/1284P is a complex microcontroller with more peripheral units
than can be supported within the 64 location reserved in Opcode for the IN and OUT instructions. For the Extended I/O
space from $60 - $FF, only the ST/STS/STD and LD/LDS/LDD instructions can be used.
EIFR
PCIFR
Reserved
Reserved
TIFR3
TIFR2
TIFR1
TIFR0
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
PORTD
DDRD
PIND
PORTC
DDRC
PINC
PORTB
DDRB
PINB
PORTA
DDRA
PINA
Name
PORTD7
PORTC7
PORTB7
PORTA7
PIND7
PINC7
DDD7
DDC7
PINB7
PINA7
Bit 7
DDB7
DDA7
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
PORTD6
PORTC6
PORTB6
PORTA6
PIND6
PINC6
PINB6
PINA6
DDD6
DDC6
Bit 6
DDB6
DDA6
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
ATmega164A/PA/324A/PA/644A/PA/1284/P
PORTD5
PORTC5
PORTB5
PORTA5
PIND5
PINC5
PINB5
PINA5
DDD5
DDC5
DDB5
DDA5
Bit 5
ICF3
ICF1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
PORTD4
PORTC4
PORTB4
PORTA4
PIND4
PINC4
PINB4
PINA4
DDD4
DDC4
Bit 4
DDB4
DDA4
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
PORTD3
PORTC3
PORTB3
PORTA3
PIND3
PINC3
PINB3
PINA3
PCIF3
DDD3
DDC3
DDB3
DDA3
Bit 3
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
PORTD2
PORTC2
PORTB2
PORTA2
OCF3B
OCF2B
OCF1B
OCF0B
PIND2
PINC2
INTF2
PCIF2
DDD2
DDC2
PINB2
PINA2
Bit 2
DDB2
DDA2
-
-
-
-
-
-
-
-
-
-
-
PORTD1
PORTC1
PORTB1
PORTA1
OCF3A
OCF2A
OCF1A
OCF0A
PIND1
PINC1
INTF1
PCIF1
DDD1
DDC1
PINB1
PINA1
Bit 1
DDB1
DDA1
-
-
-
-
-
-
-
-
-
-
-
PORTD0
PORTC0
PORTB0
PORTA0
PIND0
PINC0
INTF0
PCIF0
DDD0
DDC0
PINB0
PINA0
Bit 0
TOV3
TOV2
TOV1
TOV0
DDB0
DDA0
-
-
-
-
-
-
-
-
-
-
-
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