ATmega3290 Atmel Corporation, ATmega3290 Datasheet
ATmega3290
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ATmega3290 Summary of contents
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... Programming of Flash, EEPROM, Fuses, and Lock Bits through the JTAG Interface • Peripheral Features – Segment LCD Driver (ATmega329/ATmega649) – Segment LCD Driver (ATmega3290/ATmega6490) – Two 8-bit Timer/Counters with Separate Prescaler and Compare Mode – One 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and Capture Mode – ...
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... Pin Configurations Figure 1-1. Pinout ATmega3290/6490 1 LCDCAP 2 (RXD/PCINT0) PE0 3 (TXD/PCINT1) PE1 4 (XCK/AIN0/PCINT2) PE2 (AIN1/PCINT3) PE3 5 6 (USCK/SCL/PCINT4) PE4 7 (DI/SDA/PCINT5) PE5 8 (DO/PCINT6) PE6 9 (CLKO/PCINT7) PE7 VCC 10 11 GND 12 DNC 13 (PCINT24/SEG35) PJ0 14 (PCINT25/SEG34) PJ1 DNC 15 16 DNC 17 DNC 18 DNC 19 (SS/PCINT8) PB0 (SCK/PCINT9) PB1 20 21 ...
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Figure 1-2. Pinout ATmega329/649 LCDCAP 1 (RXD/PCINT0) PE0 2 (TXD/PCINT1) PE1 3 (XCK/AIN0/PCINT2) PE2 4 (AIN1/PCINT3) PE3 5 (USCK/SCL/PCINT4) PE4 6 (DI/SDA/PCINT5) PE5 7 (DO/PCINT6) PE6 8 (CLKO/PCINT7) PE7 9 (SS/PCINT8) PB0 10 (SCK/PCINT9) PB1 11 (MOSI/PCINT10) PB2 12 (MISO/PCINT11) ...
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Overview The ATmega329/3290/649/6490 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architec- ture. By executing powerful instructions in a single clock cycle, the ATmega329/3290/649/6490 achieves throughputs approaching 1 MIPS per MHz allowing the system designer ...
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The Atmel ters. All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in one single instruction executed in one clock cycle. The resulting architecture is more code efficient while ...
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... Comparison between ATmega329, ATmega3290, ATmega649 and ATmega6490 The ATmega329, ATmega3290, ATmega649, and ATmega6490 differs only in memory sizes, pin count and pinout. devices. Table 2-1. Device ATmega329 ATmega3290 ATmega649 ATmega6490 2.3 Pin Descriptions The following section describes the I/O-pin special functions. 2.3 Digital supply voltage. ...
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Port C (PC7..PC0) Port 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port C output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port C ...
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... As inputs, Port J pins that are externally pulled low will source current if the pull-up resistors are activated. The Port J pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port J also serves the functions of various special features of the ATmega3290/6490 as listed on page 75. ...
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LCDCAP An external capacitor (typical > 470nF) must be connected to the LCDCAP pin as shown in ure 23-2. This capacitor acts as a reservoir for LCD power (V ripple Resources A comprehensive set of development ...
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... Reserved - (0xC9) Reserved - (0xC8) Reserved - (0xC7) UDR0 (0xC6) UBRR0H (0xC5) UBRR0L (0xC4) 2552KS–AVR–04/11 Registers with bold type only available in ATmega3290/6490. Bit 6 Bit 5 Bit 4 SEG338 SEG337 SEG336 SEG330 SEG329 SEG328 SEG322 SEG321 SEG320 SEG314 SEG313 SEG312 SEG306 SEG305 SEG304 ...
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Address Name Bit 7 Reserved - (0xC3) UCSR0C - (0xC2) UCSR0B RXCIE0 (0xC1) UCSR0A RXC0 (0xC0) Reserved - (0xBF) Reserved - (0xBE) Reserved - (0xBD) Reserved - (0xBC) Reserved - (0xBB) USIDR (0xBA) USISR USISIF (0xB9) USICR USISIE (0xB8) Reserved ...
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Address Name Bit 7 TCNT1L (0x84) Reserved - (0x83) TCCR1C FOC1A (0x82) TCCR1B ICNC1 (0x81) TCCR1A COM1A1 (0x80) DIDR1 - (0x7F) DIDR0 ADC7D (0x7E) Reserved - (0x7D) ADMUX REFS1 (0x7C) ADCSRB - (0x7B) ADCSRA ADEN (0x7A) ADCH (0x79) ADCL (0x78) ...
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Address Name Bit 7 Reserved - 0x25 (0x45) TCCR0A FOC0A 0x24 (0x44) GTCCR TSM 0x23 (0x43) EEARH - 0x22 (0x42) EEARL 0x21 (0x41) EEDR 0x20 (0x40) EECR - 0x1F (0x3F) GPIOR0 0x1E (0x3E) EIMSK PCIE3 0x1D (0x3D) EIFR PCIF3 0x1C ...
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Instruction Set Summary Mnemonics Operands ARITHMETIC AND LOGIC INSTRUCTIONS ADD Rd, Rr Add two Registers ADC Rd, Rr Add with Carry two Registers ADIW Rdl,K Add Immediate to Word SUB Rd, Rr Subtract two Registers SUBI Rd, K Subtract ...
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Mnemonics Operands BRTC k Branch if T Flag Cleared BRVS k Branch if Overflow Flag is Set BRVC k Branch if Overflow Flag is Cleared BRIE k Branch if Interrupt Enabled BRID k Branch if Interrupt Disabled BIT AND BIT-TEST ...
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Mnemonics Operands IN Rd Port OUT P, Rr Out Port PUSH Rr Push Register on Stack POP Rd Pop Register from Stack MCU CONTROL INSTRUCTIONS NOP No Operation SLEEP Sleep WDR Watchdog Reset BREAK Break 2552KS–AVR–04/11 ATmega329/3290/649/6490 Description ...
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Ordering Information 8.1 ATmega329 (3) Speed (MHz) Power Supply 8 1.8 - 5.5V 16 2.7 - 5.5V Notes: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information ...
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... Lead Pitch, Thin Profile Plastic Quad Flat Package (TQFP) 2552KS–AVR–04/11 ATmega329/3290/649/6490 (2) Ordering Code Package Type ATmega3290V-8AU 100A (4) ATmega3290V-8AUR 100A ATmega3290-16AU 100A (4) ATmega3290-16AUR 100A and Figure 28-2 on page 328. Package Type (1) Operational Range Industrial 0°C to 85°C) (-4 Industrial 0°C to 85°C) (-4 ...
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ATmega649 (3) Speed (MHz) Power Supply 8 1.8 - 5.5V 16 2.7 - 5.5V Notes: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities. ...
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ATmega6490 (3) Speed (MHz) Power Supply 8 1.8 - 5.5V 16 2.7 - 5.5V Notes: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities. ...
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Packaging Information 9.1 64A PIN 0°~7° Notes: 1.This package conforms to JEDEC reference MS-026, Variation AEB. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is 0.25 mm per side. Dimensions D1 and ...
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Marked Pin TOP VIEW BOTTOM VIEW Notes: 1. JEDEC Standard MO-220, (SAW Singulation) Fig. 1, VMMD. 2. Dimension and tolerance conform to ASMEY14.5M-1994. 2325 Orchard Parkway San Jose, CA 95131 R ...
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PIN 0°~7° L Notes: 1. This package conforms to JEDEC reference MS-026, Variation AED. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is 0.25 mm per side. Dimensions D1 and E1 ...
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Errata 10.1 ATmega329 10.1.1 ATmega329 rev. C • Interrupts may be lost when writing the timer registers in the asynchronous timer 1. Interrupts may be lost when writing the timer registers in the asynchronous timer The interrupt will be ...
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... Timer Control Register (TCCRx), asynchronous Timer Counter Register (TCNTx), or asynchronous Output Compare Register (OCRx). 10.2.2 ATmega3290 rev. B Not sampled. 10.2.3 ATmega3290 rev. A • LCD contrast voltage too high • Interrupts may be lost when writing the timer registers in the asynchronous timer 1. LCD contrast voltage too high When the LCD is active and using low power waveform, the LCD contrast voltage can be too high ...
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ATmega649 10.3.1 ATmega649 rev. A • Interrupts may be lost when writing the timer registers in the asynchronous timer 1. Interrupts may be lost when writing the timer registers in the asynchronous timer The interrupt will be lost if ...
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Datasheet Revision History Please note that the referring page numbers in this section are referring to this document.The referring revision in this section are referring to the document revision. 11.1 Rev. 2552K – 04/ ...
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Rev. 2552G – 07/ 11.6 Rev. 2552F – 06/ 11.7 Rev. 2552E – 04/06 1. 11.8 Rev. 2552D – 03/06 1. 11.9 Rev. 2552C – 03/ ...
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Rev. 2552B – 05/ 11.11 Rev. 2552A –11/04 1. 2552KS–AVR–04/11 MLF-package alternative changed to “Quad Flat No-Lead/Micro Lead Frame Package QFN/MLF”. Added “Pin Change Interrupt Timing” on page Updated Table 23-6 ...
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... Atmel Munich GmbH Business Campus Parkring 4 D-85748 Garching b. Munich GERMANY Tel: (+49) 89-31970-0 Fax: (+49) 89-3194621 ® and others are registered trademarks or trademarks of Atmel Corporation or its Atmel Japan 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 JAPAN Tel: (+81)(3) 3523-3551 Fax: (+81)(3) 3523-7581 2552KS–AVR–04/11 ...