ATmega329P Atmel Corporation, ATmega329P Datasheet - Page 243

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ATmega329P

Manufacturer Part Number
ATmega329P
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega329P

Flash (kbytes)
32 Kbytes
Pin Count
64
Max. Operating Frequency
20 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
54
Ext Interrupts
17
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Segment Lcd
100
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
2
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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23.5.3
8021G–AVR–03/11
LCDFRR – LCD Frame Rate Register
Table 23-3.
Note:
• Bit 7 – Reserved
This bit is reserved and will always read as zero.
• Bits 6:4 – LCDPS2:0: LCD Prescaler Select
The LCDPS2:0 bits selects tap point from a prescaler. The prescaled output can be further
divided by setting the clock divide bits (LCDCD2:0). The different selections are shown in
23-4. Together they determine the prescaled LCD clock (clk
module.
Table 23-4.
Bit
(0xE6)
Read/Write
Initial Value
LCDPM3
LCDPS2
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1. LCDPM3 is reserved and will always read as zero in ATmega329P.
LCDPM2
LCDPS1
LCD Port Mask (Values in bold are only available in ATmega3290P) (Continued)
LCD Prescaler Select
R
7
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
LCDPS2
R/W
LCDPM1
6
0
LCDPS0
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
LCDPS1
R/W
5
0
LCDPM0
Output from
Prescaler
clk
clk
clk
clk
clk
clk
0
1
0
1
0
1
0
1
0
1
0
1
LCDPS0
LCD
LCD
LCD
R/W
LCD
LCD
LCD
4
0
/128
/256
/512
/16
/64
/N
I/O Port in Use as
R
Segment Driver
3
0
Applied Prescaled LCD Clock Frequency
SEG0:36
SEG0:38
SEG0:39
SEG0:20
SEG0:22
SEG0:23
SEG0:24
SEG0:26
SEG0:28
SEG0:30
SEG0:32
SEG0:34
when LCDCD2:0 = 0, Duty = 1/4, and
ATmega329P/3290P
LCDCD2
LCD_PS
R/W
2
0
Frame Rate = 64 Hz
), which is clocking the LCD
LCDCD1
R/W
130kHz
260kHz
1
0
8.1kHz
33kHz
66kHz
Maximum Number
LCDCD0
of Segments
R/W
0
0
21
23
24
25
27
29
31
33
35
37
39
40
LCDFRR
Table
243

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