ATmega329P Atmel Corporation, ATmega329P Datasheet - Page 298

• Manufacturer Part Number: ATmega329P
• Manufacturer: Atmel Corporation

Specifications of ATmega329P

• Flash (kbytes): 32 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 20 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 54
• Ext Interrupts: 17
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Twi (i2c): 1
• Uart: 1
• Segment Lcd: 100
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 2
• Eeprom (bytes): 1024
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 4
• Input Capture Channels: 1
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

8021G–AVR–03/11
Table 27-4.
Notes:
Table 27-5.
Notes:
The status of the Fuse bits is not affected by Chip Erase. Note that the Fuse bits are locked if
Lock bit1 (LB1) is programmed. Program the Fuse bits before programming the Lock bits.
Fuse High Byte
OCDEN
JTAGEN
SPIEN
WDTON
EESAVE
BOOTSZ1
BOOTSZ0
BOOTRST
Fuse Low Byte
CKDIV8
CKOUT
SUT1
SUT0
CKSEL3
CKSEL2
CKSEL1
CKSEL0
(1)
1. The SPIEN Fuse is not accessible in serial programming mode.
2. The default value of BOOTSZ1...0 results in maximum Boot Size. See
3. See
4. Never ship a product with the OCDEN Fuse programmed regardless of the setting of Lock bits
5. If the JTAG interface is left unconnected, the JTAGEN fuse should if possible be disabled. This
1. The default value of SUT1...0 results in maximum start-up time for the default clock source.
2. The default setting of CKSEL3...0 results in internal RC Oscillator @ 8MHz. See
3. The CKOUT Fuse allow the system clock to be output on PORTE7. See
4. See
(3)
(4)
(4)
(3)
(5)
for details.
and JTAGEN Fuse. A programmed OCDEN Fuse enables some parts of the clock system to
be running in all sleep modes. This may increase the power consumption.
to avoid static current at the TDO pin in the JTAG interface.
See
page 31
on page 33
Fuse High Byte
Fuse Low Byte
”WDTCR – Watchdog Timer Control Register” on page 50
”System and Reset Characteristics” on page 336
”System Clock Prescaler” on page 33
for details.
for details.
7
6
5
4
3
2
1
0
Bit No
Bit No
7
6
5
4
3
2
1
0
Description
Divide clock by 8
Clock output
Select start-up time
Select start-up time
Select Clock source
Select Clock source
Select Clock source
Select Clock source
Description
Enable OCD
Enable JTAG
Enable Serial Program and Data
Downloading
Watchdog Timer always on
EEPROM memory is preserved
through the Chip Erase
Select Boot Size (see
page 300
Select Boot Size (see
page 300
Select Reset Vector
for details)
for details)
for details.
Table 27-9 on
Table 27-9 on
ATmega329P/3290P
for details.
for details.
Default Value
0 (programmed)
1 (unprogrammed)
1 (unprogrammed)
0 (programmed)
0 (programmed)
0 (programmed)
1 (unprogrammed)
0 (programmed)
Default Value
1 (unprogrammed, OCD
disabled)
0 (programmed, JTAG
enabled)
0 (programmed, SPI
prog. enabled)
1 (unprogrammed)
1 (unprogrammed,
EEPROM not preserved)
0 (programmed)
0 (programmed)
1 (unprogrammed)
Table 26-6 on page 292
”Clock Output Buffer”
Table 8-7 on
(1)
(2)
(2)
(2)
(2)
(2)
(1)
(2)
298