ATmega48 Automotive Atmel Corporation, ATmega48 Automotive Datasheet - Page 135

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ATmega48 Automotive

Manufacturer Part Number
ATmega48 Automotive
Description
Manufacturer
Atmel Corporation

Specifications of ATmega48 Automotive

Flash (kbytes)
4 Kbytes
Pin Count
32
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
12
Hardware Qtouch Acquisition
No
Max I/o Pins
23
Ext Interrupts
24
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
0.5
Eeprom (bytes)
256
Self Program Memory
NO
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 125
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
6
Input Capture Channels
1
Pwm Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
17.2
17.2.1
17.2.2
7701E–AVR–02/11
Register Description
ADCSRB – ADC Control and Status Register B
ACSR – Analog Comparator Control and Status Register
Table 17-1.
• Bit 6 – ACME: Analog Comparator Multiplexer Enable
When this bit is written logical one and the ADC is switched off (ADEN in ADCSRA is zero),
the ADC multiplexer selects the negative input to the analog comparator. When this bit is writ-
ten logical zero, AIN1 is applied to the negative input of the analog comparator. For a detailed
description of this bit, see
• Bit 7 – ACD: Analog Comparator Disable
When this bit is written logical one, the power to the analog comparator is switched off. This bit
can be set at any time to turn off the analog comparator. This will reduce power consumption
in active and idle mode. When changing the ACD bit, the analog comparator interrupt must be
disabled by clearing the ACIE bit in ACSR. Otherwise an interrupt can occur when the bit is
changed.
• Bit 6 – ACBG: Analog Comparator Bandgap Select
When this bit is set, a fixed bandgap reference voltage replaces the positive input to the ana-
log comparator. When this bit is cleared, AIN0 is applied to the positive input of the analog
comparator.
• Bit 5 – ACO: Analog Comparator Output
The output of the analog comparator is synchronized and then directly connected to ACO. The
synchronization introduces a delay of one to two clock cycles.
Bit
0x03 (0x23)
Read/Write
Initial Value
Bit
0x08 (0x28)
Read/Write
Initial Value
ACME
0
1
1
1
1
1
1
1
1
1
Analog Comparator Multiplexed Input
ACD
R/W
R/W
BIN
ADEN
7
0
7
0
x
1
0
0
0
0
0
0
0
0
ACBG
ACME
R/W
R/W
6
0
“Analog Comparator Multiplexed Input” on page
6
0
Atmel ATtiny24/44/84 [Preliminary]
MUX4..0
00000
00001
00010
00011
00100
00101
00110
00111
xx
xx
ACO
R/W
N/A
5
R
5
0
ADLAR
Analog Comparator Negative Input
AIN1
AIN1
ADC0
ADC1
ADC2
ADC3
ADC4
ADC5
ADC6
ADC7
R/W
ACI
R/w
4
0
4
0
ACIE
R/W
R
3
0
3
0
ADTS2
ACIC
R/W
R/W
2
0
2
0
ADTS1
ACIS1
R/W
R/W
1
0
1
0
134.
ADTS0
ACIS0
R/W
R/W
0
0
0
0
ADCSRB
ACSR
135

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