ATmega48 Automotive Atmel Corporation, ATmega48 Automotive Datasheet - Page 69

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ATmega48 Automotive

Manufacturer Part Number
ATmega48 Automotive
Description
Manufacturer
Atmel Corporation

Specifications of ATmega48 Automotive

Flash (kbytes)
4 Kbytes
Pin Count
32
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
12
Hardware Qtouch Acquisition
No
Max I/o Pins
23
Ext Interrupts
24
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
0.5
Eeprom (bytes)
256
Self Program Memory
NO
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 125
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
6
Input Capture Channels
1
Pwm Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
7701E–AVR–02/11
• Port B, Bit 3 – RESET/dW/PCINT11
RESET: External Reset input is active low and enabled by un-programming ("1") the RST-
DISBL fuse. Pull-up is activated and output driver and digital input are deactivated when the
pin is used as the RESET pin.
dW: When the debugWIRE enable (DWEN) fuse is programmed and lock bits are un-pro-
grammed, the debugWIRE system within the target device is activated. The RESET port pin is
configured as a wire-AND (open-drain) bi-directional I/O pin with pull-up enabled and becomes
the communication gateway between target and emulator.
PCINT11: Pin change interrupt source 11. The PB3 pin can serve as an external interrupt
source for pin change interrupt 1.
Table 12-8 on page 69
the overriding signals shown in
Table 12-8.
1.
2.
Signal
Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
PTOE
DIEOE
DIEOV
DI
AIO
RSTDISBL is 1 when the Fuse is “0” (Programmed).
DebugWIRE is enabled when DWEN fuse is programmed and lock bits are un-programmed.
PB3/
PCINT11
RSTDISBL
1
RSTDISBL
DEBUGWIRE_ENABLE
Transmit
RSTDISBL
0
0
RSTDISBL
+ PCINT11 • PCIE1
DEBUGWIRE_ENABLE
• PCINT11 • PCIE1)
dW/PCINT11 Input
Overriding Signals for Alternate Functions in PB3..PB2
RESET/dW/
(1)
(1)
(1)
(1)
+ DEBUGWIRE_ENABLE
+ DEBUGWIRE_ENABLE
+ DEBUGWIRE_ENABLE
+ DEBUGWIRE_ENABLE
and
Atmel ATtiny24/44/84 [Preliminary]
Table 12-9 on page 70
Figure 12-5 on page
(2)
(2)
• debugWire
+ (RSTDISBL
(2)
(2)
(2)
(2)
(1)
relate the alternate functions of Port B to
62.
PB2/INT0/OC0A/CKOUT/PCINT10
CKOUT
0
CKOUT
1'b1
CKOUT + OC0A enable
CKOUT • System Clock + CKOUT • OC0A
0
PCINT10 • PCIE1 + INT0
PCINT10 • PCIE1 + INT0
INT0/PCINT10 Input
69

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