ATmega8515 Atmel Corporation, ATmega8515 Datasheet - Page 140

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ATmega8515

Manufacturer Part Number
ATmega8515
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega8515

Flash (kbytes)
8 Kbytes
Pin Count
44
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
35
Ext Interrupts
3
Usb Speed
No
Usb Interface
No
Spi
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
0.5
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
3
Input Capture Channels
1
Pwm Channels
3
32khz Rtc
No
Calibrated Rc Oscillator
Yes

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Frame Formats
Parity Bit Calculation
140
ATmega8515(L)
A serial frame is defined to be one character of data bits with synchronization bits (start
and stop bits), and optionally a parity bit for error checking. The USART accepts all 30
combinations of the following as valid frame formats:
A frame starts with the start bit followed by the least significant data bit. Then the next
data bits, up to a total of nine, are succeeding, ending with the most significant bit. If
enabled, the parity bit is inserted after the data bits, before the stop bits. When a com-
plete frame is transmitted, it can be directly followed by a new frame, or the
communication line can be set to an idle (high) state. Figure 67 illustrates the possible
combinations of the frame formats. Bits inside brackets are optional.
Figure 67. Frame Formats
The frame format used by the USART is set by the UCSZ2:0, UPM1:0 and USBS bits in
UCSRB and UCSRC. The Receiver and Transmitter use the same setting. Note that
changing the setting of any of these bits will corrupt all ongoing communication for both
the Receiver and Transmitter.
The USART Character SiZe (UCSZ2:0) bits select the number of data bits in the frame.
The USART Parity mode (UPM1:0) bits enable and set the type of parity bit. The selec-
tion between one or two stop bits is done by the USART Stop Bit Select (USBS) bit. The
Receiver ignores the second stop bit. An FE (Frame Error) will therefore only be
detected in the cases where the first stop bit is zero.
The parity bit is calculated by doing an exclusive-or of all the data bits. If odd parity is
used, the result of the exclusive or is inverted. The relation between the parity bit and
data bits is as follows::
St
(n)
P
Sp
IDLE
P
P
d
n
even
odd
1 start bit
5, 6, 7, 8, or 9 data bits
no, even or odd parity bit
1 or 2 stop bits
(IDLE)
Start bit, always low
Data bits (0 to 8)
Parity bit. Can be odd or even
Stop bit, always high
No transfers on the communication line (RxD or TxD). An IDLE line must be
high.
Parity bit using even parity
Parity bit using odd parity
Data bit n of the character
St
P
0
P
even
odd
1
=
=
d
d
2
n 1
n 1
3
4
FRAME
[5]
d
d
3
3
[6]
d
d
2
2
[7]
d
d
1
1
[8]
d
d
0
0
[P]
0
1
Sp1 [Sp2]
(St / IDLE)
2512K–AVR–01/10

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