ATmega8515 Atmel Corporation, ATmega8515 Datasheet - Page 145

• Manufacturer Part Number: ATmega8515
• Manufacturer: Atmel Corporation

Specifications of ATmega8515

• Flash (kbytes): 8 Kbytes
• Pin Count: 44
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 35
• Ext Interrupts: 3
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 3
• Input Capture Channels: 1
• Pwm Channels: 3
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

Data Reception – The
USART Receiver
Receiving Frames with 5 to 8
Data Bits
Receiving Frames with 9 Data
Bits
2512K–AVR–01/10
The USART Receiver is enabled by writing the Receive Enable (RXEN) bit in the
UCSRB Register to one. When the Receiver is enabled, the normal pin operation of the
RxD pin is overridden by the USART and given the function as the Receiver’s serial
input. The baud rate, mode of operation and frame format must be set up once before
any serial reception can be done. If synchronous operation is used, the clock on the
XCK pin will be used as transfer clock.
The Receiver starts data reception when it detects a valid start bit. Each bit that follows
the start bit will be sampled at the baud rate or XCK clock, and shifted into the receive
Shift Register until the first stop bit of a frame is received. A second stop bit will be
ignored by the Receiver. When the first stop bit is received (i.e., a complete serial frame
is present in the Receive Shift Register), the contents of the Shift Register will be moved
into the receive buffer. The receive buffer can then be read by reading the UDR I/O
location.
The following code example shows a simple USART receive function based on polling
of the Receive Complete (RXC) Flag. When using frames with less than eight bits the
most significant bits of the data read from the UDR will be masked to zero. The USART
has to be initialized before the function can be used.
Note:
The function simply waits for data to be present in the receive buffer by checking the
RXC Flag, before reading the buffer and returning the value.
If 9-bit characters are used (UCSZ=7) the ninth bit must be read from the RXB8 bit in
UCSRB before reading the low bits from the UDR. This rule applies to the FE, DOR, and
PE Status Flags as well. Read status from UCSRA, then data from UDR. Reading the
UDR I/O location will change the state of the receive buffer FIFO and consequently the
TXB8, FE, DOR, and PE bits, which all are stored in the FIFO, will change.
The following code example shows a simple USART receive function that handles both
9-bit characters and the status bits.
Assembly Code Example
C Code Example
USART_Receive:
unsigned char USART_Receive( void )
{
}
; Wait for data to be received
sbis UCSRA, RXC
rjmp USART_Receive
; Get and return received data from buffer
in
ret
/* Wait for data to be received */
while ( !(UCSRA & (1<<RXC)) )
/* Get and return received data from buffer */
return UDR;
1. See “About Code Examples” on page 7.
r16, UDR
;
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ATmega8515(L)
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