ATmega8515 Atmel Corporation, ATmega8515 Datasheet - Page 175

• Manufacturer Part Number: ATmega8515
• Manufacturer: Atmel Corporation

Specifications of ATmega8515

• Flash (kbytes): 8 Kbytes
• Pin Count: 44
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 35
• Ext Interrupts: 3
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 3
• Input Capture Channels: 1
• Pwm Channels: 3
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

Preventing Flash Corruption
Programming Time for Flash
when using SPM
Simple Assembly Code
Example for a Boot Loader
2512K–AVR–01/10
During periods of low V
age is too low for the CPU and the Flash to operate properly. These issues are the same
as for board level systems using the Flash, and the same design solutions should be
applied.
A Flash program corruption can be caused by two situations when the voltage is too low.
First, a regular write sequence to the Flash requires a minimum voltage to operate cor-
rectly. Secondly, the CPU itself can execute instructions incorrectly, if the supply voltage
for executing instructions is too low.
Flash corruption can easily be avoided by following these design recommendations (one
is sufficient):
1. If there is no need for a Boot Loader update in the system, program the Boot
2. Keep the AVR RESET active (low) during periods of insufficient power supply
3. Keep the AVR core in Power-down Sleep mode during periods of low V
The calibrated RC Oscillator is used to time Flash accesses. Table 77 shows the typical
programming time for Flash accesses from the CPU.
Table 77. SPM Programming Time
Symbol
Flash Write (Page Erase, Page
Write, and write Lock bits by SPM)
Loader Lock bits to prevent any Boot Loader software updates.
voltage. This can be done by enabling the internal Brown-out Detector (BOD) if
the operating voltage matches the detection level. If not, an external low V
Reset Protection circuit can be used. If a Reset occurs while a write operation is
in progress, the write operation will be completed provided that the power supply
voltage is sufficient.
will prevent the CPU from attempting to decode and execute instructions, effec-
tively protecting the SPMCR Register and thus the Flash from unintentional
writes.
can
Boot
.equ PAGESIZEB = PAGESIZE*2
words
.org SMALLBOOTSTART
Write_page:
;-the routine writes one page of data from RAM to Flash
; the first data location in RAM is pointed to by the Y pointer
; the first data location in Flash is pointed to by the Z pointer
;-error handling is not included
;-the routine must be placed inside the boot space
; (at least the Do_spm sub routine). Only code inside NRWW section
; be read during Self-Programming (page erase and page write).
;-registers used: r0, r1, temp1 (r16), temp2 (r17), looplo (r24),
; loophi (r25), spmcrval (r20)
; storing and restoring of registers is not included in the routine
; register usage can be optimized at the expense of code size
;-It is assumed that either the interrupt table is moved to the
; loader section or that the interrupts are disabled.
; page erase
ldi
rcallDo_spm
spmcrval, (1<<PGERS) | (1<<SPMEN)
CC,
the Flash program can be corrupted because the supply volt-
Min Programming Time
;PAGESIZEB is page size in BYTES, not
3.7 ms
ATmega8515(L)
Max Programming Time
4.5 ms
CC
. This
CC
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