ATmega8515 Atmel Corporation, ATmega8515 Datasheet - Page 82

• Manufacturer Part Number: ATmega8515
• Manufacturer: Atmel Corporation

Specifications of ATmega8515

• Flash (kbytes): 8 Kbytes
• Pin Count: 44
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 35
• Ext Interrupts: 3
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 3
• Input Capture Channels: 1
• Pwm Channels: 3
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

Output Compare Unit
82
ATmega8515(L)
Depending of the mode of operation used, the counter is cleared, incremented, or dec-
remented at each timer clock (clk
clock source, selected by the Clock Select bits (CS02:0). When no clock source is
selected (CS02:0 = 0) the timer is stopped. However, the TCNT0 value can be accessed
by the CPU, regardless of whether clk
priority over) all counter clear or count operations.
The counting sequence is determined by the setting of the WGM01 and WGM00 bits
located in the Timer/Counter Control Register (TCCR0). There are close connections
between how the counter behaves (counts) and how waveforms are generated on the
Output Compare output OC0. For more details about advanced counting sequences
and waveform generation, see “Modes of Operation” on page 85.
The Timer/Counter Overflow (TOV0) Flag is set according to the mode of operation
selected by the WGM01:0 bits. TOV0 can be used for generating a CPU interrupt.
The 8-bit comparator continuously compares TCNT0 with the Output Compare Register
(OCR0). Whenever TCNT0 equals OCR0, the comparator signals a match. A match will
set the Output Compare Flag (OCF0) at the next timer clock cycle. If enabled (OCIE0 =
1 and Global Interrupt Flag in SREG is set), the Output Compare Flag generates an out-
put compare interrupt. The OCF0 Flag is automatically cleared when the interrupt is
executed. Alternatively, the OCF0 Flag can be cleared by software by writing a logical
one to its I/O bit location. The waveform generator uses the match signal to generate an
output according to operating mode set by the WGM01:0 bits and Compare Output
mode (COM01:0) bits. The max and bottom signals are used by the waveform generator
for handling the special cases of the extreme values in some modes of operation. See
“Modes of Operation” on page 85.
Figure 36 shows a block diagram of the output compare unit.
Figure 36. Output Compare Unit, Block Diagram
clk
top
bottom
Tn
Timer/Counter clock, referred to as clk
Signalize that TCNT0 has reached maximum value.
Signalize that TCNT0 has reached minimum value (zero).
bottom
FOCn
top
OCRn
Waveform Generator
WGMn1:0
T0
=
). clk
(8-bit Comparator )
DATA BUS
T0
T0
is present or not. A CPU write overrides (has
can be generated from an external or internal
COMn1:0
T0
in the following.
TCNTn
OCFn (Int.Req.)
OCn
2512K–AVR–01/10