ATmega8515 Atmel Corporation, ATmega8515 Datasheet - Page 98

• Manufacturer Part Number: ATmega8515
• Manufacturer: Atmel Corporation

Specifications of ATmega8515

• Flash (kbytes): 8 Kbytes
• Pin Count: 44
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 35
• Ext Interrupts: 3
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 3
• Input Capture Channels: 1
• Pwm Channels: 3
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

Registers
98
ATmega8515(L)
Figure 47. 16-bit Timer/Counter Block Diagram
Note:
The Timer/Counter (TCNT1), Output Compare Registers (OCR1A/B), and Input Capture
Register (ICR1) are all 16-bit registers. Special procedures must be followed when
accessing the 16-bit registers. These procedures are described in the section “Access-
ing 16-bit Registers” on page 100. The Timer/Counter Control Registers (TCCR1A/B)
are 8-bit registers and have no CPU access restrictions. Interrupt requests (abbreviated
to Int.Req. in the figure) signals are all visible in the Timer Interrupt Flag Register (TIFR).
All interrupts are individually masked with the Timer Interrupt Mask Register (TIMSK).
TIFR and TIMSK are not shown in the figure since these registers are shared by other
timer units.
The Timer/Counter can be clocked internally, via the prescaler, or by an external clock
source on the T1 pin. The Clock Select logic block controls which clock source and edge
the Timer/Counter uses to increment (or decrement) its value. The Timer/Counter is
inactive when no clock source is selected. The output from the clock select logic is
referred to as the timer clock (clk
The double buffered Output Compare Registers (OCR1A/B) are compared with the
Timer/Counter value at all time. The result of the compare can be used by the waveform
generator to generate a PWM or variable frequency output on the Output Compare Pin
(OC1A/B). See “Output Compare Units” on page 106. The Compare Match event will
1. Refer to Figure 1 on page 2, Table 29 on page 67, and Table 35 on page 72 for
Timer/Counter1 pin placement and description.
Timer/Counter
TCCRnA
OCRnB
OCRnA
TCNTn
ICRn
=
=
Direction
Count
Clear
T
1
).
Control Logic
TOP
=
TCCRnB
Values
BOTTOM
Fixed
TOP
ICFn (Int.Req.)
clk
Detector
(1)
Edge
=
Tn
0
OCnA
(Int.Req.)
OCnB
(Int.Req.)
TOVn
(Int.Req.)
Clock Select
Generation
Generation
( From Prescaler )
Waveform
Waveform
Canceler
Detector
Noise
Edge
Comparator Ouput )
( From Analog
2512K–AVR–01/10
OCnA
OCnB
ICPn
Tn