ATtiny167 Automotive Atmel Corporation, ATtiny167 Automotive Datasheet - Page 102

• Manufacturer Part Number: ATtiny167 Automotive
• Manufacturer: Atmel Corporation

Specifications of ATtiny167 Automotive

• Flash (kbytes): 16 Kbytes
• Pin Count: 20
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 8
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 16
• Ext Interrupts: 16
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Twi (i2c): 1
• Uart: 1
• Lin: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 150
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 3
• Input Capture Channels: 1
• Pwm Channels: 9
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

14.8
102
Compare Match Output Unit
Atmel ATtiny24/44/84 [Preliminary]
Be aware that the COM1x1:0 bits are not double buffered together with the compare value.
Changing the COM1x1:0 bits will take effect immediately.
The Compare Output mode (COM1x1:0) bits have two functions. The Waveform Generator
uses the COM1x1:0 bits for defining the Output Compare (OC1x) state at the next compare
match. Secondly the COM1x1:0 bits control the OC1x pin output source.
102
registers, I/O bits, and I/O pins in the figure are shown in bold. Only the parts of the general I/O
port control registers (DDR and PORT) that are affected by the COM1x1:0 bits are shown.
When referring to the OC1x state, the reference is for the internal OC1x register, not the OC1x
pin. If a system reset occurs, the OC1x register is reset to "0".
Figure 14-5. Compare Match Output Unit, Schematic
The general I/O port function is overridden by the Output Compare (OC1x) from the Waveform
Generator if either of the COM1x1:0 bits are set. However, the OC1x pin direction (input or
output) is still controlled by the Data Direction Register (DDR) for the port pin. The Data Direc-
tion Register bit for the OC1x pin (DDR_OC1x) must be set as output before the OC1x value is
visible on the pin. The port override function is generally independent of the Waveform Gener-
ation mode, but there are some exceptions. See
113
The design of the Output Compare pin logic allows initialization of the OC1x state before the
output is enabled. Note that some COM1x1:0 bit settings are reserved for certain modes of
operation. See
The COM1x1:0 bits have no effect on the Input Capture unit.
and
shows a simplified schematic of the logic affected by the COM1x1:0 bit settings. The I/O
COMnx1
COMnx0
FOCnx
clk
I/O
Table 14-3 on page 114
“Register Description” on page 113
Waveform
Generator
for details.
D
D
D
PORT
DDR
OCnx
Q
Q
Q
Table 14-1 on page
1
0
113,
Figure 14-5 on page
Table 14-2 on page
7701E–AVR–02/11
OCnx
Pin