ATtiny167 Automotive Atmel Corporation, ATtiny167 Automotive Datasheet - Page 126

• Manufacturer Part Number: ATtiny167 Automotive
• Manufacturer: Atmel Corporation

Specifications of ATtiny167 Automotive

• Flash (kbytes): 16 Kbytes
• Pin Count: 20
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 8
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 16
• Ext Interrupts: 16
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Twi (i2c): 1
• Uart: 1
• Lin: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 150
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 3
• Input Capture Channels: 1
• Pwm Channels: 9
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

16.3.3
126
Atmel ATtiny24/44/84 [Preliminary]
SPI Slave Operation Example
The following code demonstrates how to use the USI module as a SPI Slave:
The code is size optimized using only eight instructions (+ ret). The code example assumes
that the DO is configured as output and USCK pin is configured as input in the DDR register.
The value stored in register r16 prior to the function being called is transferred to the master
device, and when the transfer is completed, the data received from the master is stored back
into the r16 register.
Note that the first two instructions are for initialization only and need only to be executed once.
These instructions set the three-wire mode and positive edge shift register clock. The loop is
repeated until the USI counter overflow flag is set.
ret
init:
...
SlaveSPITransfer:
SlaveSPITransfer_loop:
out
in
ldi
out
out
ldi
out
in
sbrs
rjmp
in
ret
USICR,r17
r16,USIDR
r16,(1<<USIWM0)|(1<<USICS1)
USICR,r16
USIDR,r16
r16,(1<<USIOIF)
USISR,r16
r16, USISR
r16, USIOIF
SlaveSPITransfer_loop
r16,USIDR
7701E–AVR–02/11