ATtiny25 Atmel Corporation, ATtiny25 Datasheet
ATtiny25
Specifications of ATtiny25
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ATtiny25 Summary of contents
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... Operating Voltage – 1.8 - 5.5V for ATtiny25V/45V/85V – 2.7 - 5.5V for ATtiny25/45/85 • Speed Grade – ATtiny25V/45V/85V: 0 – 4 MHz @ 1.8 - 5.5V MHz @ 2.7 - 5.5V – ATtiny25/45/85: 0 – 10 MHz @ 2.7 - 5.5V MHz @ 4.5 - 5.5V • Industrial Temperature Range • Low Power Consumption – Active Mode: • 1 MHz, 1.8V: 300 µA – Power-down Mode: • ...
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... Pin Configurations Figure 1-1. Pinout ATtiny25/45/85 (PCINT5/RESET/ADC0/dW) PB5 (PCINT3/XTAL1/CLKI/OC1B/ADC3) PB3 (PCINT4/XTAL2/CLKO/OC1B/ADC2) PB4 (PCINT5/RESET/ADC0/dW) PB5 (PCINT3/XTAL1/CLKI/OC1B/ADC3) PB3 (PCINT4/XTAL2/CLKO/OC1B/ADC2) PB4 NOTE: Bottom pad should be soldered to ground. DNC: Do Not Connect 1.1 Pin Descriptions 1.1.1 VCC Supply voltage. 1.1.2 GND Ground. 1.1.3 Port B (PB5:PB0) Port 6-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port B output buffers have symmetrical drive characteristics with both high sink and source capability ...
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... The Port B pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port B also serves the functions of various special features of the ATtiny25/45/85 as listed in “Alternate Functions of Port B” on page On ATtiny25, the programmable I/O ports PB3 and PB4 (pins 2 and 3) are exchanged in ATtiny15 Compatibility Mode for supporting the backward compatibility with ATtiny15 ...
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... Overview The ATtiny25/45/ low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATtiny25/45/85 achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed. 2.1 Block Diagram Figure 2-1 ...
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... On-chip ISP Flash allows the Program memory to be re-programmed In-System through an SPI serial interface conventional non-volatile memory programmer On-chip boot code running on the AVR core. The ATtiny25/45/85 AVR is supported with a full suite of program and system development tools including: C Compilers, Macro Assemblers, Program Debugger/Simulators and Evaluation kits. 2586NS–AVR–04/11 ...
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... QTouch Library User Guide – also available from the Atmel website. 3.4 Data Retention Reliability Qualification results show that the projected data retention failure rate is much less than 1 PPM over 20 years at 85°C or 100 years at 25°C. ATtiny25/45/85 6 ® ® and QMatrix acquisi- ...
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... REFS0 ADLAR REFS2 MUX3 ADSC ADATE ADIF ADIE ADC Data Register High Byte ADC Data Register Low Byte ACME IPR – – – – – ATtiny25/45/85 Bit 2 Bit 1 Bit – SP9 SP8 SP2 SP1 SP0 – – – – ...
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... Some of the Status Flags are cleared by writing a logical one to them. Note that, unlike most other AVRs, the CBI and SBI instructions will only operation the specified bit, and can therefore be used on registers containing such Status Flags. The CBI and SBI instructions work with registers 0x00 to 0x1F only. ATtiny25/45/85 8 2586NS–AVR–04/11 ...
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... PC ← then PC ← then PC ← then PC ← then PC ← then PC ← I/O(P,b) ← 1 I/O(P,b) ← 0 Rd(n+1) ← Rd(n), Rd(0) ← 0 Rd(n) ← Rd(n+1), Rd(7) ← 0 Rd(0)←C,Rd(n+1)← Rd(n),C←Rd(7) Rd(7)←C,Rd(n)← Rd(n+1),C←Rd(0) ATtiny25/45/85 Operation Flags #Clocks Z,C,N,V,H Z,C,N,V,H Z,C,N,V,S Z,C,N,V,H Z,C,N,V,H Z,C,N,V,H Z,C,N,V,H Z,C,N,V,S ...
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... Push Register on Stack POP Rd Pop Register from Stack MCU CONTROL INSTRUCTIONS NOP No Operation SLEEP Sleep WDR Watchdog Reset BREAK Break ATtiny25/45/85 10 Description Rd(n) ← Rd(n+1), n=0..6 Rd(3..0)←Rd(7..4),Rd(7..4)←Rd(3..0) SREG(s) ← 1 SREG(s) ← ← Rr(b) Rd(b) ← ← ← ← ← ← ← ...
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... R: tape & reel 4. Can also be supplied in wafer form. Contact your local Atmel sales office for ordering information and minimum quantities. 5. For Typical and Electrical characteristics for this device please consult Appendix A, ATtiny25/V Specification at 105°C. 8P3 8-lead, 0.300" Wide, Plastic Dual Inline Package (PDIP) 8S2 8-lead, 0.208" ...
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... Wide, Plastic Dual Inline Package (PDIP) 8S2 8-lead, 0.208" Wide, Plastic Gull-Wing Small Outline (EIAJ SOIC) 8X 8-lead, 4.4 mm Wide, Plastic Thin Shrink Small Outline Package (TSSOP) 20M1 20-pad 0.8 mm Body, Quad Flat No-Lead/Micro Lead Frame Package (QFN/MLF) ATtiny25/45/85 12 Temperature Range Package 8P3 8S2 Industrial (4) (-40° ...
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... Temperature Range Package 8P3 Industrial 8S2 (4) (-40°C to +85°C) 20M1 8P3 Industrial 8S2 (4) (-40°C to +85°C) 20M1 21.3 “Speed” on page 168. Package Types ATtiny25/45/85 (2) (3) Ordering Code ATtiny85V-10PU ATtiny85V-10SU ATtiny85V-10SUR ATtiny85V-10SH ATtiny85V-10MU ATtiny85V-10MUR ATtiny85-20PU ATtiny85-20SU ATtiny85-20SUR ATtiny85-20SH ATtiny85-20MU ATtiny85-20MUR 13 ...
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... E and eA measured with the leads constrained to be perpendicular to datum. 5. Pointed or rounded lead tips are preferred to ease insertion and b3 maximum dimensions do not include Dambar protrusions. Dambar protrusions shall not exceed 0.010 (0.25 mm). 2325 Orchard Parkway San Jose, CA 95131 R ATtiny25/45/ ...
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... N N TOP VIEW TOP VIEW SIDE VIEW SIDE VIEW TITLE 8S2, 8-lead, 0.208” Body, Plastic Small Outline Package (EIAJ) ATtiny25/45/ θ θ END VIEW END VIEW COMMON DIMENSIONS (Unit of Measure = mm) MIN NOM MAX SYMBOL A 1 ...
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... S8S1 Top View e Side View L End View Notes: 1. This drawing is for general information only; refer to JEDEC Drawing MS-012 for proper dimensions, tolerances, datums,etc. 2325 Orchard Parkway San Jose, CA 95131 R ATtiny25/45/ TITLE S8S1, 8-lead, 0.150" Wide Body, Plastic Gull Wing Small ...
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... Orchard Parkway San Jose, CA 95131 R 2586NS–AVR–04/ TITLE 8X, 8-lead, 4.4 mm Body Width, Plastic Thin Shrink Small Outline Package (TSSOP) ATtiny25/45/85 End View L L Ø Ø COMMON DIMENSIONS (Unit of Measure = mm) MIN NOM MAX SYMBOL A 1.05 1.10 1.20 A1 0.05 ...
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... D2 Pin #1 Notch (0. BOTTOM VIEW Reference JEDEC Standard MO-220, Fig. 1 (SAW Singulation) WGGD-5. Note: 2325 Orchard Parkway San Jose, CA 95131 R ATtiny25/45/ TITLE 20M1, 20-pad 0.8 mm Body, Lead Pitch 0.50 mm, 2.6 mm Exposed Pad, Micro Lead Frame Package (MLF) ...
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... Errata 8.1 Errata ATtiny25 The revision letter in this section refers to the revision of the ATtiny25 device. 8.1.1 Rev D and E No known errata. 8.1.2 Rev B and C • EEPROM read may fail at low supply voltage / low clock frequency 1. EEPROM read may fail at low supply voltage / low clock frequency Trying to read EEPROM at low clock frequencies and/or low supply voltage may result in invalid data ...
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... EEPROM read may fail at low supply voltage / low clock frequency 1. Too high power down power consumption Three situations will lead to a too high power down power consumption. These are: – An external clock is selected by fuses, but the I/O PORT is still enabled as an output. ATtiny25/45/85 20 2586NS–AVR–04/11 ...
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... Similarly, if supply voltage can not be raised above 2V then operating fre- quency should be more than 1MHz. This feature is known to be temperature dependent but it has not been characterised. Guidelines are given for room temperature, only. 2586NS–AVR–04/11 the interrupt. ATtiny25/45/85 21 ...
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... If operating frequency can not be raised above 1MHz then supply voltage should be more than 2V. Similarly, if supply voltage can not be raised above 2V then operating fre- quency should be more than 1MHz. This feature is known to be temperature dependent but it has not been characterised. Guidelines are given for room temperature, only. ATtiny25/45/85 22 2586NS–AVR–04/11 ...
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... Section – – EEPROM errata on pages 217, 217, 218, 219, and – Ordering information on pages 209, 210, and 211. 9.2 Rev. 2586M-07/10 1. Clarified 2. Added Ordering Codes -SN and -SNR for ATtiny25 extended temperature. 9.3 Rev. 2586L-06/10 1. Added: – TSSOP for ATtiny45 in – – ...
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... Updated Tables: – – – – ATtiny25/45/85 24 Table 20-16, “High-voltage Serial Programming Instruction Set for ATtiny25/45/85,” on page 163 Table 21-1, “DC Characteristics. T Table 21-11, “Serial Programming Characteristics, T 5.5V (Unless Otherwise Noted),” on page “Data Retention” on page 6 “Low Level Interrupt” on page 51 “Device Signature Imprint Table” on page 153 “ ...
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... COM0B[1:0]: Compare Match Output B Mode” on page 80 “Bits 2:0 – ADTS[2:0]: ADC Auto Trigger Source” on page 142 “SPMCSR – Store Program Memory Control and Status Register” on page “Errata ATtiny25” on page 217 “Errata ATtiny45” on page 217 “Errata ATtiny85” on page 220 “ ...
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... Rev. 2586I-09/ ATtiny25/45/85 26 Updated “Bit 0” in “PRR – Power Reduction Register” on page Added footnote to Table 8-3 on page Updated Table 10-5 on page 65. Deleted “Bits 7, 2” in “MCUCR – MCU Control Register” on page Updated and moved section “Timer/Counter0 Prescaler and Clock Sources”, now ...
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... Information” on page Updated Features in “Analog to Digital Converter” on page Updated Operation in “Analog to Digital Converter” on page Updated Table 17-2 on page 138. Updated Table 17-3 on page 138. Updated “Errata” on page 217. ATtiny25/45/85 111. 114. 123. 154. 166. 27. 31. 29. 27. 32. 35. 36. 129. ...
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... Rev. 2586B-05/ 9.14 Rev. 2586A-02/05 Initial revision. ATtiny25/45/85 28 Updated Table 6-13 on page 30, Table 6-9 on page 29, Table 6-5 on page page 139, Table 20-16 on page 163, Updated “Timer/Counter1 in PWM Mode” on page Updated text “Bit 2 – TOV1: Timer/Counter1 Overflow Flag” on page Updated values in “ ...
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... ATtiny25/45/85 29 ...
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... Atmel Corporation. All rights reserved. ® Atmel , logo and combinations thereof, and others are registered trademarks or trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others. International Atmel Asia Limited Atmel Munich GmbH Unit 01-5 & ...