ATtiny25 Automotive Atmel Corporation, ATtiny25 Automotive Datasheet - Page 10

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ATtiny25 Automotive

Manufacturer Part Number
ATtiny25 Automotive
Description
Manufacturer
Atmel Corporation

Specifications of ATtiny25 Automotive

Flash (kbytes)
2 Kbytes
Pin Count
8
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
4
Hardware Qtouch Acquisition
No
Max I/o Pins
6
Ext Interrupts
6
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
4
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
0.12
Eeprom (bytes)
128
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 125
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
5
Pwm Channels
6
32khz Rtc
No
Calibrated Rc Oscillator
Yes
5.5
5.5.1
10
General Purpose Register File
Atmel ATtiny24/44/84 [Preliminary]
The X-register, Y-register, and Z-register
The register file is optimized for the Atmel
achieve the required performance and flexibility, the following input/output schemes are sup-
ported by the register file:
• One 8-bit output operand and one 8-bit result input
• Two 8-bit output operands and one 8-bit result input
• Two 8-bit output operands and one 16-bit result input
• One 16-bit output operand and one 16-bit result input
Figure 5-2 on page 10
CPU.
Figure 5-2.
Most of the instructions operating on the Register File have direct access to all registers, and
most of them are single cycle instructions.
As shown in
directly into the first 32 locations of the user data space. Although not physically implemented
as SRAM locations, this memory organization provides great flexibility in access of the regis-
ters, as the X-, Y- and Z-registers can be set to index any register in the file.
The registers R26..R31 have some added functions to their general purpose usage. These
registers are 16-bit address pointers for indirect addressing of the data space. The three indi-
rect address registers X, Y, and Z are defined as described in
Registers
Purpose
Working
General
Figure
AVR CPU General Purpose Working Registers
5-2, each register is also assigned a data memory address, mapping them
shows the structure of the 32 general purpose working registers in the
7
R13
R14
R15
R16
R17
R26
R27
R28
R29
R30
R31
R0
R1
R2
®
AVR
0
®
Enhanced RISC instruction set. In order to
Addr.
0x0D
0x0E
0x1A
0x1B
0x1C
0x1D
0x1E
0x00
0x01
0x02
0x0F
0x10
0x11
0x1F
Figure 5-3 on page
X-register High Byte
Y-register High Byte
Z-register High Byte
X-register Low Byte
Y-register Low Byte
Z-register Low Byte
7701E–AVR–02/11
11.

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