ATtiny25 Automotive Atmel Corporation, ATtiny25 Automotive Datasheet - Page 116

no-image

ATtiny25 Automotive

Manufacturer Part Number
ATtiny25 Automotive
Description
Manufacturer
Atmel Corporation

Specifications of ATtiny25 Automotive

Flash (kbytes)
2 Kbytes
Pin Count
8
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
4
Hardware Qtouch Acquisition
No
Max I/o Pins
6
Ext Interrupts
6
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
4
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
0.12
Eeprom (bytes)
128
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 125
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
5
Pwm Channels
6
32khz Rtc
No
Calibrated Rc Oscillator
Yes
14.11.3
116
Atmel ATtiny24/44/84 [Preliminary]
TCCR1C – Timer/Counter1 Control Register C
When the ICR1 is used as top value (see description of the WGM13:0 bits located in the
TCCR1A and the TCCR1B registers), the ICP1 is disconnected, and, consequently, the input
capture function is disabled.
• Bit 5 – Reserved Bit
This bit is reserved for future use. For ensuring compatibility with future devices, this bit must
be written to logical zero when TCCR1B is written.
• Bit 4:3 – WGM13:2: Waveform Generation Mode
See TCCR1A Register description.
• Bit 2:0 – CS12:0: Clock Select
The three Clock select bits select the clock source to be used by the timer/counter (see
14-10
Table 14-5.
If external pin modes are used for the Timer/Counter1, transitions on the T1 pin will clock the
counter even if the pin is configured as an output. This feature allows software control of the
counting.
• Bit 7 – FOC1A: Force Output Compare for Channel A
• Bit 6 – FOC1B: Force Output Compare for Channel B
The FOC1A/FOC1B bits are only active when the WGM13:0 bits specify a non-PWM mode.
However, for ensuring compatibility with future devices, these bits must be set to zero when
TCCR1A is written while operating in a PWM mode. When writing a logical one to the
FOC1A/FOC1B bit, an immediate compare match is forced on the waveform generation unit.
The OC1A/OC1B output is changed according to its COM1x1:0 bit settings. Note that the
FOC1A/FOC1B bits are implemented as strobes. Therefore, it is the value present in the
COM1x1:0 bits that determine the effect of the forced compare.
Bit
0x22 (0x42)
Read/Write
Initial Value
CS12
0
0
0
0
1
1
1
1
and
Figure
CS11
Clock Select Bit Description
0
0
1
1
0
0
1
1
FOC1A
W
7
0
14-11.
CS10
FOC1B
0
1
0
1
0
1
0
1
W
6
0
Description
No clock source (Timer/Counter stopped).
clk
clk
clk
clk
clk
External clock source on T1 pin. Clock on falling edge.
External clock source on T1 pin. Clock on rising edge.
I/O
I/O
I/O
I/O
I/O
R
5
0
/1 (No prescaling)
/8 (From prescaler)
/64 (From prescaler)
/256 (From prescaler)
/1024 (From prescaler)
R
4
0
R
3
0
R
2
0
R
1
0
R
0
0
7701E–AVR–02/11
TCCR1C
Figure

Related parts for ATtiny25 Automotive