ATtiny25 Automotive Atmel Corporation, ATtiny25 Automotive Datasheet - Page 154

• Manufacturer Part Number: ATtiny25 Automotive
• Manufacturer: Atmel Corporation

Specifications of ATtiny25 Automotive

• Flash (kbytes): 2 Kbytes
• Pin Count: 8
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 4
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 6
• Ext Interrupts: 6
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 4
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.12
• Eeprom (bytes): 128
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 125
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 5
• Pwm Channels: 6
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

18.10.4
154
Atmel ATtiny24/44/84 [Preliminary]
ADCSRB – ADC Control and Status Register B
• Bits 7 – BIN: Bipolar Input Mode
The gain stage is working in the unipolar mode by default, but the bipolar mode can be
selected by writing the BIN bit in the ADCSRB register. In the unipolar mode, only one-sided
conversions are supported, and the voltage on the positive input must always be larger than
the voltage on the negative input. Otherwise, the result is saturated to the voltage reference. In
the bipolar mode, two-sided conversions are supported, and the result is represented in two's
complement form. In unipolar mode, the resolution is 10 bits, and in bipolar mode the resolu-
tion is 9 bits + 1 sign bit.
• Bit 6 – ACME: Analog Comparator Multiplexer Enable
See
• Bit 5 – Res: Reserved Bit
This bit is reserved bit in the Atmel® ATtiny24/44/84, and will always read as what was written
there.
• Bit 4 – ADLAR: ADC Left Adjust Result
The ADLAR bit affects the presentation of the ADC conversion result in the ADC data register.
Write logical one to ADLAR to left adjust the result. Otherwise, the result is right adjusted.
Changing the ADLAR bit will affect the ADC data register immediately, regardless of any
ongoing conversions. For a complete description of this bit, see
Data Register” on page
• Bit 3 – Res: Reserved Bit
This bit is reserved bit in the Atmel
there.
• Bits 2:0 – ADTS2:0: ADC Auto Trigger Source
If ADATE in ADCSRA is written to logical one, the value of these bits selects which source will
trigger an ADC conversion. If ADATE is cleared, the ADTS2:0 settings will have no effect. A
conversion will be triggered by the rising edge of the selected interrupt flag. Note that switch-
ing from a trigger source that is cleared to a trigger source that is set will generate a positive
edge on the trigger signal. If ADEN in ADCSRA is set, this will start a conversion. Switching to
free running mode (ADTS[2:0]=0) will not cause a trigger event, even if the ADC Interrupt Flag
is set.
Bit
0x03 (0x23)
Read/Write
Initial Value
“ADCSRB – ADC Control and Status Register B” on page
R/W
BIN
7
0
153.
ACME
R/W
6
0
R/W
®
5
–
0
ATtiny24/44/84, and will always read as what was written
ADLAR
R/W
4
0
R/W
3
–
0
ADTS2
R/W
2
0
135.
“ADCL and ADCH – ADC
ADTS1
R/W
1
0
ADTS0
R/W
0
0
7701E–AVR–02/11
ADCSRB