ATtiny25 Automotive Atmel Corporation, ATtiny25 Automotive Datasheet - Page 73

• Manufacturer Part Number: ATtiny25 Automotive
• Manufacturer: Atmel Corporation

Specifications of ATtiny25 Automotive

• Flash (kbytes): 2 Kbytes
• Pin Count: 8
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 4
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 6
• Ext Interrupts: 6
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 4
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.12
• Eeprom (bytes): 128
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 125
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 5
• Pwm Channels: 6
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

13.2.2
13.3
13.4
7701E–AVR–02/11
Timer/Counter Clock Sources
Counter Unit
Definitions
Timer/Counter uses to increment (or decrement) its value. The Timer/Counter is inactive when
no clock source is selected. The output from the Clock Select logic is referred to as the timer
clock (clk
The double buffered Output Compare Registers (OCR0A and OCR0B) is compared with the
Timer/Counter value at all times. The result of the compare can be used by the Waveform
Generator to generate a PWM or variable frequency output on the Output Compare pins
(OC0A and OC0B). See
event will also set the Compare Flag (OCF0A or OCF0B) which can be used to generate an
Output Compare interrupt request.
Many register and bit references in this section are written in general form. A lower case "n"
replaces the timer/counter number, in this case 0. A lower case "x" replaces the output com-
pare unit, in this case compare unit A or compare unit B. However, when using the register or
bit defines in a program, the precise form must be used, i.e., TCNT0 for accessing timer/coun-
ter 0 counter value and so on.
The definitions in
Table 13-1.
The Timer/Counter can be clocked by an internal or an external clock source. The clock
source is selected by the Clock Select logic which is controlled by the Clock Select (CS02:0)
bits located in the Timer/Counter Control Register (TCCR0B). For details on clock sources
and prescaler, see
The main part of the 8-bit Timer/Counter is the programmable bi-directional counter unit.
ure 13-2 on page 73
Figure 13-2. Counter Unit Block Diagram
BOTTOM
MAX
TOP
T0
).
DATA BUS
Definitions
The counter reaches the BOTTOM when it becomes 0x00.
The counter reaches its MAXimum when it becomes 0xFF (decimal 255).
The counter reaches the TOP when it becomes equal to the highest value in
the count sequence. The TOP value can be assigned to be the fixed value
0xFF (MAX) or the value stored in the OCR0A Register. The assignment is
dependent on the mode of operation.
TCNTn
Table 13-1 on page 73
“Timer/Counter Prescaler” on page
shows a block diagram of the counter and its surroundings.
“Output Compare Unit” on page 74
Atmel ATtiny24/44/84 [Preliminary]
direction
count
clear
bottom
are also used extensively throughout the document.
Control Logic
top
TOVn
(Int.Req.)
clk
120.
Tn
for details. The Compare Match
Clock Select
( From Prescaler )
Detector
Edge
Tn
Fig-
73