ATtiny26 Atmel Corporation, ATtiny26 Datasheet - Page 5

• Manufacturer Part Number: ATtiny26
• Manufacturer: Atmel Corporation

Specifications of ATtiny26

• Flash (kbytes): 2 Kbytes
• Pin Count: 20
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 16
• Ext Interrupts: 11
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 0.12
• Eeprom (bytes): 128
• Self Program Memory: NO
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 3
• Pwm Channels: 4
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

Pin Descriptions
VCC
GND
AVCC
Port A (PA7..PA0)
Port B (PB7..PB0)
XTAL1
XTAL2
1477KS–AVR–08/10
Digital supply voltage pin.
Digital ground pin.
AVCC is the supply voltage pin for Port A and the A/D Converter (ADC). It should be externally
connected to V
through a low-pass filter. See page 94 for details on operating of the ADC.
Port A is an 8-bit general purpose I/O port. PA7..PA0 are all I/O pins that can provide internal
pull-ups (selected for each bit). Port A has alternate functions as analog inputs for the ADC and
analog comparator and pin change interrupt as described in “Alternate Port Functions” on page
46.
Port B is an 8-bit general purpose I/O port. PB6..0 are all I/O pins that can provide internal pull-
ups (selected for each bit). PB7 is an I/O pin if not used as the reset. To use pin PB7 as an I/O
pin, instead of RESET pin, program (“0”) RSTDISBL Fuse. Port B has alternate functions for the
ADC, clocking, timer counters, USI, SPI programming, and pin change interrupt as described in
“Alternate Port Functions” on page 46.
An External Reset is generated by a low level on the PB7/RESET pin. Reset pulses longer than
50 ns will generate a reset, even if the clock is not running. Shorter pulses are not guaranteed to
generate a reset.
Input to the inverting oscillator amplifier and input to the internal clock operating circuit.
Output from the inverting oscillator amplifier.
CC
, even if the ADC is not used. If the ADC is used, it should be connected to V
CC
5