ATtiny28L Atmel Corporation, ATtiny28L Datasheet - Page 30

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ATtiny28L

Manufacturer Part Number
ATtiny28L
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATtiny28L

Flash (kbytes)
2 Kbytes
Pin Count
28
Max. Operating Frequency
4 MHz
Cpu
8-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
11
Ext Interrupts
10
Usb Speed
No
Usb Interface
No
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
0.03
Self Program Memory
NO
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
1
32khz Rtc
No
Calibrated Rc Oscillator
Yes
Port D
Port D as General Digital I/O
30
ATtiny28L/V
Figure 26. PORT B Schematic Diagram (Pins PB7 - PB5)
Port D is an 8-bit bi-directional I/O port with internal pull-up resistors.
Three I/O memory address locations are allocated for Port D, one each for the Data
Register – PORTD, $12, Data Direction Register – DDRD, $11 and the Port D Input Pins
– PIND, $10. The Port D Input Pins address is read-only, while the Data Register and
the Data Direction Register are read/write.
The Port D output buffers can sink 10 mA. As inputs, Port D pins that are externally
pulled low will source current if the pull-up resistors are activated.
All eight pins in Port D have equal functionality when used as digital I/O pins.
PDn, general I/O pin: The DDDn bit in the DDRD register selects the direction of this pin.
If DDDn is set (one), PDn is configured as an output pin. If DDDn is cleared (zero), PDn
is configured as an input pin. If PDn is set (one) when configured as an input pin, the
MOS pull-up resistor is activated. To switch the pull-up resistor off, the PDn has to be
cleared (zero), or the pin has to be configured as an output pin. The port pins are tri-
stated when a reset condition becomes active, even if the clock is not running.
Table 12. DDDn Bits on Port D Pins
Note:
DDDn
0
0
1
1
PBn
n: 7,6,...,0, pin number
MOS
PULL-
UP
PORTDn
RP:
n:
0
1
0
1
READ PORT B PIN
5 - 7
Output
Output
Input
Input
I/O
Pull-up
Yes
NO
No
No
Comment
Tri-state (high-Z)
PDn will source current if ext. pulled low
Push-pull Zero Output
Push-pull One Output
RP
TO LOW-LEVEL DETECTOR
PULL-UP PORT B
1062F–AVR–07/06

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