SAM4S16C Atmel Corporation, SAM4S16C Datasheet - Page 176

• Manufacturer Part Number: SAM4S16C
• Manufacturer: Atmel Corporation

Specifications of SAM4S16C

• Flash (kbytes): 1024 Kbytes
• Pin Count: 100
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 79
• Ext Interrupts: 79
• Usb Transceiver: 1
• Quadrature Decoder Channels: 2
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 3
• Twi (i2c): 2
• Uart: 4
• Ssc: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 1000
• Analog Comparators: 1
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 128
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: No
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

11.6.10.1
176
176
SAM4S
SAM4S
B, BL, BX, and BLX
Branch instructions.
Syntax
B{cond} label
BL{cond} label
BX{cond} Rm
BLX{cond} Rm
where:
B
BL
BX
BLX
cond
label
Rm
Operation
All these instructions cause a branch to
Bcond label
other branch instructions must be conditional inside an IT block, and must be unconditional out-
side the IT block, see
The table below shows the ranges for the various branch instructions.
Table 11-26. Branch Ranges
The
.
Restrictions
The restrictions are:
Instruction
B label
Bcond label
Bcond label
BL{cond} label
BX{cond} Rm
BLX{cond} Rm
• The
• The
• do not use PC in the
R14).
.W
suffix might be used to get the maximum branch range. See
BL
BX
is the only conditional instruction that can be either inside or outside an IT block. All
(outside IT block)
(inside IT block)
and
and
BLX
BLX
is branch (immediate).
is branch with link (immediate).
is branch indirect (register).
is branch indirect with link (register).
is an optional condition code, see
is a PC-relative expression. See
is a register that indicates an address to branch to. Bit[0] of the value in
but the address to branch to is created by changing bit[0] to 0.
instructions write the address of the next instruction to LR (the link register,
instructions result in a UsageFault exception if bit[0] of
“IT”
BLX
.
instruction
Any value in register
Any value in register
Branch Range
− 16 MB to +16 MB
− 1 MB to +1 MB
− 16 MB to +16 MB
− 16 MB to +16 MB
label
, or to the address indicated in
“PC-relative Expressions”
“Conditional Execution”
.
“Instruction Width Selection”
.
Rm
Rm
11100A–ATARM–28-Oct-11
11100A–ATARM–28-Oct-11
is 0.
. In addition:
Rm
must be 1,