SAM4S16C Atmel Corporation, SAM4S16C Datasheet - Page 78

• Manufacturer Part Number: SAM4S16C
• Manufacturer: Atmel Corporation

Specifications of SAM4S16C

• Flash (kbytes): 1024 Kbytes
• Pin Count: 100
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 79
• Ext Interrupts: 79
• Usb Transceiver: 1
• Quadrature Decoder Channels: 2
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 3
• Twi (i2c): 2
• Uart: 4
• Ssc: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 1000
• Analog Comparators: 1
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 128
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: No
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

Table 11-13. Cortex-M4 Instructions (Continued)
78
78
Mnemonic
IT
LDM
LDMDB, LDMEA
LDMFD, LDMIA
LDR
LDRB, LDRBT
LDRD
LDREX
LDREXB
LDREXH
LDRH, LDRHT
LDRSB, DRSBT
LDRSH, LDRSHT
LDRT
LSL, LSLS
LSR, LSRS
MLA
MLS
MOV, MOVS
MOVT
MOVW, MOV
MRS
MSR
MUL, MULS
MVN, MVNS
NOP
ORN, ORNS
ORR, ORRS
PKHTB, PKHBT
POP
PUSH
QADD
QADD16
QADD8
QASX
QDADD
SAM4S
SAM4S
Operands
-
Rn{!}, reglist
Rn{!}, reglist
Rn{!}, reglist
Rt, [Rn, #offset]
Rt, [Rn, #offset]
Rt, Rt2, [Rn, #offset]
Rt, [Rn, #offset]
Rt, [Rn]
Rt, [Rn]
Rt, [Rn, #offset]
Rt, [Rn, #offset]
Rt, [Rn, #offset]
Rt, [Rn, #offset]
Rd, Rm, <Rs|#n>
Rd, Rm, <Rs|#n>
Rd, Rn, Rm, Ra
Rd, Rn, Rm, Ra
Rd, Op2
Rd, #imm16
Rd, #imm16
Rd, spec_reg
spec_reg, Rm
{Rd,} Rn, Rm
Rd, Op2
-
{Rd,} Rn, Op2
{Rd,} Rn, Op2
{Rd,} Rn, Rm, Op2
reglist
reglist
{Rd,} Rn, Rm
{Rd,} Rn, Rm
{Rd,} Rn, Rm
{Rd,} Rn, Rm
{Rd,} Rn, Rm
Load Register with two bytes
Load Register with halfword
Load Register with signed halfword
Load Register with word
Description
If-Then condition block
Load Multiple registers, increment after
Load Multiple registers, decrement before
Load Multiple registers, increment after
Load Register with word
Load Register with byte
Load Register Exclusive
Load Register Exclusive with byte
Load Register Exclusive with halfword
Load Register with signed byte
Logical Shift Left
Logical Shift Right
Multiply with Accumulate, 32-bit result
Multiply and Subtract, 32-bit result
Move
Move Top
Move 16-bit constant
Move from special register to general register
Move from general register to special register
Multiply, 32-bit result
Move NOT
No Operation
Logical OR NOT
Logical OR
Pack Halfword
Pop registers from stack
Push registers onto stack
Saturating Add 16
Saturating Add 8
Saturating Add and Subtract with Exchange
Saturating Add
Saturating double and Add
11100A–ATARM–28-Oct-11
11100A–ATARM–28-Oct-11
Flags
-
-
-
-
-
-
-
-
-
-
-
-
-
-
N,Z,C
N,Z,C
-
-
N,Z,C
-
N,Z,C
-
N,Z,C,V
N,Z
N,Z,C
-
N,Z,C
N,Z,C
-
-
-
Q
-
-
-
Q