SAM4S16C Atmel Corporation, SAM4S16C Datasheet - Page 82

• Manufacturer Part Number: SAM4S16C
• Manufacturer: Atmel Corporation

Specifications of SAM4S16C

• Flash (kbytes): 1024 Kbytes
• Pin Count: 100
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 79
• Ext Interrupts: 79
• Usb Transceiver: 1
• Quadrature Decoder Channels: 2
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 3
• Twi (i2c): 2
• Uart: 4
• Ssc: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 1000
• Analog Comparators: 1
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 128
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: No
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

Table 11-13. Cortex-M4 Instructions (Continued)
11.6.2
82
82
Mnemonic
VLMA.F32
VLMS.F32
VMOV.F32
VMOV
VMOV
VMOV
VMOV
VMOV
VMRS
VMSR
VMUL.F32
VNEG.F32
VNMLA.F32
VNMLS.F32
VNMUL
VPOP
VPUSH
VSQRT.F32
VSTM
VSTR.F<32|64>
VSUB.F<32|64>
WFE
WFI
SAM4S
SAM4S
CMSIS Functions
Operands
{Sd,} Sn, Sm
{Sd,} Sn, Sm
Sd, #imm
Sd, Sm
Sn, Rt
Sm, Sm1, Rt, Rt2
Dd[x], Rt
Rt, Dn[x]
Rt, FPSCR
FPSCR, Rt
{Sd,} Sn, Sm
Sd, Sm
Sd, Sn, Sm
Sd, Sn, Sm
{Sd,} Sn, Sm
list
list
Sd, Sm
Rn{!}, list
Sd, [Rn]
{Sd,} Sn, Sm
-
-
ISO/IEC cannot directly access some Cortex-M4 instructions. This section describes intrinsic
functions that can generate these instructions, provided by the CMIS and that might be provided
by a C compiler. If a C compiler does not support an appropriate intrinsic function, the user might
have to use inline assembler to access some instructions.
The CMSIS provides the following intrinsic functions to generate instructions that ISO/IEC C
code cannot directly access:
Table 11-14. CMSIS Functions to Generate some Cortex-M4 Instructions
Instruction
CPSIE I
CPSID I
CPSIE F
CPSID F
ISB
DSB
DMB
REV
REV16
Description
Floating-point Multiply Accumulate
Floating-point Multiply Subtract
Floating-point Move immediate
Floating-point Move register
Copy ARM core register to single precision
Copy 2 ARM core registers to 2 single precision
Copy ARM core register to scalar
Copy scalar to ARM core register
Move FPSCR to ARM core register or APSR
Move to FPSCR from ARM Core register
Floating-point Multiply
Floating-point Negate
Floating-point Multiply and Add
Floating-point Multiply and Subtract
Floating-point Multiply
Pop extension registers
Push extension registers
Calculates floating-point Square Root
Floating-point register Store Multiple
Stores an extension register to memory
Floating-point Subtract
Wait For Event
Wait For Interrupt
CMSIS Function
void __enable_irq(void)
void __disable_irq(void)
void __enable_fault_irq(void)
void __disable_fault_irq(void)
void __ISB(void)
void __DSB(void)
void __DMB(void)
uint32_t __REV(uint32_t int value)
uint32_t __REV16(uint32_t int value)
11100A–ATARM–28-Oct-11
11100A–ATARM–28-Oct-11
Flags
-
-
-
-
-
-
-
-
N,Z,C,V
FPSCR
-
-
-
-
-
-
-
-
-
-
-
-
-