SAM4S16C Atmel Corporation, SAM4S16C Datasheet - Page 900

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SAM4S16C

Manufacturer Part Number
SAM4S16C
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM4S16C

Flash (kbytes)
1024 Kbytes
Pin Count
100
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
79
Ext Interrupts
79
Usb Transceiver
1
Quadrature Decoder Channels
2
Usb Speed
Full Speed
Usb Interface
Device
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
36.6
36.6.1
900
900
Functional Description
SAM4S
SAM4S
PWM Clock Generator
The
Figure 36-2. Functional View of the Clock Generator Block Diagram
The PWM master clock (MCK) is divided in the clock generator module to provide different
clocks available for all channels. Each channel can independently select one of the divided
clocks.
The clock generator is divided in three blocks:
• Clocked by the master clock (MCK), the clock generator module provides 13 clocks.
• Each channel can independently choose one of the clock generator outputs.
• Each channel generates an output waveform with attributes that can be defined
independently for each channel through the user interface registers.
PWM
– a modulo n counter which provides 11 clocks: F
– two linear dividers (1, 1/2, 1/3, ... 1/255) that provide two separate clocks: clkA and
F
clkB
MCK
macrocell is primarily composed of a clock generator module and 4 channels.
/16, F
MCK
/32, F
MCK
MCK
/64, F
modulo n counter
MCK
/128, F
MCK
PREA
PREB
/256, F
PWM_MR
PWM_MR
Divider A
Divider B
MCK
DIVA
DIVB
MCK
, F
MCK
MCK/2
MCK/4
MCK/8
MCK/16
MCK/32
MCK/64
MCK/128
MCK/256
MCK/512
MCK/1024
MCK
/512, F
/2, F
clkA
clkB
MCK
MCK
/1024
/4, F
11100A–ATARM–28-Oct-11
11100A–ATARM–28-Oct-11
MCK
/8,

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